PROGRAMMABLE LOGIC DEVICE

• US 20120293206A1
• Filed: 05/03/2012
• Published: 11/22/2012
• Est. Priority Date: 05/19/2011
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: YONEDA, Seiichi, NISHIJIMA, Tatsuji
• Granted Patent: US 8,581,625 B2
• Time in Patent Office: Days
• US Class Current: 326/101
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H03K 19/0008 Arrangements for reducing power consumption
• CPC Class Codes: H03K 19/0013 in field effect transistor circuits
• CPC Class Codes: H03K 19/17736 Structural details of routing resources
• CPC Class Codes: H03K 19/17744 for input/output signals

Abstract

An object is to provide a programmable logic device having logic blocks connected to each other by a programmable switch, where the programmable switch is characterized by an oxide semiconductor transistor incorporated therein. The extremely low off-state current of the oxide semiconductor transistor provides a function as a non-volatile memory due to its high ability to hold a potential of a gate electrode of a transistor which is connected to the oxide semiconductor transistor. The ability of the oxide semiconductor transistor to function as a non-volatile memory allows the configuration data for controlling the connection of the logic blocks to be maintained even in the absence of a power supply potential. Hence, the rewriting process of the configuration data at starting of the device can be omitted, which contributes to the reduction in power consumption of the device.

Claims

1. A semiconductor device comprising:

a first wiring and a second wiring;

a logic block electrically connected to the first wiring and the second wiring; and

a wiring selection circuit provided at an intersection of the first wiring and the second wiring,

wherein the wiring selection circuit comprises a switch which is configured to control connection between the first wiring and the second wiring, and

wherein the switch comprises a transistor comprising an oxide semiconductor.

2. The semiconductor device according to claim 1, wherein the oxide semiconductor comprises indium and oxygen.

3. The semiconductor device according to claim 1, wherein the oxide semiconductor comprises a crystal with c-axis alignment.

4. The semiconductor device according to claim 1, wherein the oxide semiconductor comprises stoichiometrically excessive oxygen.

5. An electronic device comprising the semiconductor device according to claim 1.

6. A semiconductor device comprising:

a plurality of first wirings in a column direction and a plurality of second wirings in a row direction;

a plurality of logic blocks each of which is electrically connected to at least one of the plurality of first wirings and one of the plurality of second wirings; and

a plurality of wiring selection circuits provided at intersections of the plurality of first wirings and the plurality of second wirings,

wherein at least one of the plurality of wiring selection circuits comprises a switch which is configured to control connection between one of the plurality of first wirings and one of the plurality of second wirings, and

wherein the switch comprises a transistor comprising an oxide semiconductor.

7. The semiconductor device according to claim 6, wherein the oxide semiconductor comprises indium and oxygen.

8. The semiconductor device according to claim 6, wherein the oxide semiconductor comprises a crystal with c-axis alignment.

9. The semiconductor device according to claim 6, wherein the oxide semiconductor comprises stoichiometrically excessive oxygen.

10. An electronic device comprising the semiconductor device according to claim 6.

11. A semiconductor device comprising:

a first wiring and a second wiring;

a logic block electrically connected to the first wiring and the second wiring; and

a wiring selection circuit provided at an intersection of the first wiring and the second wiring,

wherein the wiring selection circuit comprises a switch which comprises;

a first transistor comprising a first terminal, a second terminal, and a gate; and

a second transistor comprising a first terminal, a second terminal, and a gate,

wherein the first terminal and the second terminal of the first transistor are electrically connected to the first wiring and the second wiring, respectively,

wherein the second terminal of the second transistor is electrically connected to the gate of the first transistor, and

wherein the second transistor comprises an oxide semiconductor.

12. The semiconductor device according to claim 11, wherein the first transistor comprises a single crystal semiconductor.

13. The semiconductor device according to claim 11, further comprising a capacitor electrically connected to the second terminal of the second transistor.

14. The semiconductor device according to claim 11, further comprising a buffer electrically connected between the second terminal of the second transistor and the gate of the first transistor.

15. The semiconductor device according to claim 11, further comprising an inverter electrically connected between the second terminal of the second transistor and the gate of the first transistor.

16. The semiconductor device according to claim 11, further comprising a third transistor comprising a first terminal, a second terminal, and a gate, wherein the first terminal and the second terminal of the third transistor are electrically connected to the first wiring and the second wiring, respectively.

17. The semiconductor device according to claim 16, wherein polarities of the first transistor and the third transistor are different from each other.

18. The semiconductor device according to claim 16, further comprising an inverter electrically connected between the second terminal of the second transistor and the gate of the third transistor.

19. The semiconductor device according to claim 16, further comprising a capacitor electrically connected to the second terminal of the second transistor.

20. The semiconductor device according to claim 16, further comprising a buffer electrically connected between the second terminal of the second transistor and the gate of the first transistor.

21. The semiconductor device according to claim 11, further comprising a fourth transistor comprising a first terminal, a second terminal, and a gate, wherein the gate of the second transistor is electrically connected to the gate of the fourth transistor.

22. The semiconductor device according to claim 21, further comprising a third transistor comprising a first terminal, a second terminal, and a gate, wherein the first terminal and the second terminal of the third transistor are electrically connected to the first wiring and the second wiring, respectively.

23. The semiconductor device according to claim 22, wherein polarities of the first transistor and the third transistor are different from each other.

24. The semiconductor device according to claim 21, further comprising a capacitor electrically connected to the second terminal of the second transistor.

25. The semiconductor device according to claim 21, further comprising a capacitor electrically connected to the second terminal of the fourth transistor.

26. The semiconductor device according to claim 21, further comprising a capacitor electrically connected between the second terminal of the fourth transistor and the gate of the first transistor.

27. The semiconductor device according to claim 11, wherein the oxide semiconductor comprises indium and oxygen.

28. The semiconductor device according to claim 11, wherein the oxide semiconductor comprises a crystal with c-axis alignment.

29. The semiconductor device according to claim 11, wherein the oxide semiconductor comprises stoichiometrically excessive oxygen.

30. An electronic device comprising the semiconductor device according to claim 11.