SYSTEM AND METHOD TO IMPROVE I/O PERFORMANCE OF DATA ANALYTIC WORKLOADS

• US 20120297145A1
• Filed: 05/20/2011
• Published: 11/22/2012
• Est. Priority Date: 05/20/2011
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Castillo, Claris, Spreitzer, Michael J., Steinder, Malgorzata
• Granted Patent: US 8,560,779 B2
• Time in Patent Office: Days
• US Class Current: 711/138
• CPC Class Codes: G06F 11/3404 for parallel or distributed programming
• CPC Class Codes: G06F 11/3409 for performance assessment
• CPC Class Codes: G06F 11/3414 Workload generation, e.g. scripts, playback
• CPC Class Codes: G06F 11/3466 Performance evaluation by tracing or monitoring
• CPC Class Codes: G06F 12/0868 Data transfer between cache memory and other subsystems, e.g. storage devices or host systems
• CPC Class Codes: G06F 12/0888 using selective caching, e.g. bypass
• CPC Class Codes: G06F 2201/81 Threshold
• CPC Class Codes: G06F 2201/885 Monitoring specific for caches
• CPC Class Codes: G06F 2212/205 Hybrid memory, e.g. using both volatile and non-volatile memory

Abstract

A method and structure for processing an application program on a computer. In a memory of the computer executing the application, an in-memory cache structure is provided for normally temporarily storing data produced in the processing. An in-memory storage outside the in-memory cache structure is provided in the memory, for by-passing the in-memory cache structure for temporarily storing data under a predetermined condition. A sensor detects an amount of usage of the in-memory cache structure used to store data during the processing. When it is detected that the amount of usage exceeds the predetermined threshold, the processing is controlled so that the data produced in the processing is stored in the in-memory storage rather than in the in-memory cache structure.

Claims

1. An apparatus, comprising:

at least one processor for executing a processing of an application program;

a main memory, comprising;

an in-memory cache structure for normally temporarily storing data produced in said processing; and

an in-memory storage structure outside said in-memory cache structure, for by-passing said in-memory cache structure for temporarily storing data under a predetermined condition;

a sensor for detecting an amount of usage of said in-memory cache structure used to store data during said processing; and

a controller for, upon a detection by said sensor that said amount of usage exceeds said predetermined threshold, controlling said processing so that said data produced in said processing is stored in said in-memory storage structure rather than in said in-memory cache structure.

2. The apparatus of claim 1, wherein the processing comprises a data intensive computing application and said data comprises intermediate data of said data intensive computing application.

3. The apparatus of claim 1, wherein said sensor and said controller are implemented and executed by middleware software operating on said processor, said middleware software comprising a level of software between an operating system on said processor and said application program.

4. The apparatus of claim 1, wherein said memory comprises a random access memory (RAM), said in-memory cache structure comprises a disk cache in said RAM, and said in-memory storage structure comprises an in-memory data grid (IMDG).

5. The apparatus of claim 4, wherein said processing comprises a MapReduce middleware processing.

6. The apparatus of claim 4, wherein said IMDG provides a key-value store organized into tables stored in a partitioned manner, and available functions of the IMDG comprise create a table;

destroy a table;

store a given value under a given key in a given table; and

retrieve a value (if any) most recently stored under a given key in a given table.

7. The apparatus of claim 5, wherein MapReduce middleware processing comprises Hadoop, an Apache open-source Java-based implementation of MapReduce.

8. The apparatus of claim 7, wherein:

said Hadoop implementation comprises a TaskTracker control function,

said sensor comprises a disk cache sensor (DCS) that monitors an available size of said disk cache, and

said controller comprises;

a Hannibal Actuator (HA) that interacts with said TaskTracker to work in a hybrid mode wherein intermediate data is stored in said IMDG; and

a Hannibal Controller (HC) having a function that, when said DCS reports insufficient disk cache, sets a maximum amount of memory that can be used to store intermediate data, and a function that interfaces with said HA to enter into said hybrid mode, and

wherein said DCS, said HA, and said HC are implemented as classes in said TaskTracker.

9. The apparatus of claim 4, wherein said IMDG comprises a controlled IMDG wherein is provided control over where tables are placed.

10. The apparatus of claim 1, as comprising a node in a cluster of nodes, each said node respectively executing in parallel said processing of said application program.

11. A method of processing an application program on a computer, said method comprising:

providing, in a memory of said computer executing said application, an in-memory cache structure for normally temporarily storing data produced in said processing;

providing, in said memory, an in-memory storage outside said in-memory cache structure, for by-passing said in-memory cache structure for temporarily storing data under a predetermined condition;

providing a sensor for detecting an amount of usage of said in-memory cache structure used to store data during said processing;

detecting that said amount of usage exceeds said predetermined threshold; and

controlling said processing so that said data produced in said processing is stored in said in-memory storage rather than in said in-memory cache structure.

12. The method of claim 11, wherein the processing comprises a data intensive computing application and said data comprises intermediate data of said data intensive computing application.

13. The method of claim 11, as executed by middleware software operating on said computer, said middleware comprising a level of software between an operating system on said computer and said application program.

14. The method of claim 11, wherein said memory comprises a random access memory (RAM), said in-memory cache structure comprises a disk cache in said RAM, and said in-memory storage structure comprises an in-memory data grid (IMDG).

15. The method of claim 14, wherein said processing comprises a MapReduce middleware processing.

16. A non-transitory, machine-readable storage medium tangibly embodying a series of machine-readable instructions for causing a processor to execute a method of processing an application program on a computer, said method comprising:

providing a sensor for detecting an amount of usage of an in-memory cache structure used to store data during said processing;

detecting that said amount of usage exceeds said predetermined threshold; and

controlling said processing so that said data produced in said processing is stored in an in-memory storage outside said in-memory cache structure rather than in said in-memory cache structure.

17. The storage medium of claim 16, as comprising one of:

a ROM memory on a computer, said ROM memory storing said instructions in preparation for executing said processing;

a RAM memory on a computer, said RAM memory storing said instructions as being currently being executed by a processor on said computer;

a stand-alone storage medium that can be inserted into a drive of a computer for downloading said instructions onto said computer; and

a memory in a server on a network, said server thereby capable of selectively downloading said instructions onto a computer on said network.

18. A set of machine-readable instructions, as tangibly embodied on a machine-readable storage medium, for executing a data intensive computing application, said instructions comprising:

a sensor for detecting an amount of usage of an in-memory cache structure used to store data during a processing of said data intensive computing application; and

a controller having a function that, upon a detection that said amount of usage exceeds said predetermined threshold, said processing is controlled so that said data produced in said processing is stored in an in-memory storage outside said in-memory cache structure rather than in said in-memory cache structure.

19. The set of machine-readable instructions of claim 18, wherein said in-memory cache structure comprises a disk cache in a RAM (random access memory), and said in-memory storage structure comprises an in-memory data grid (IMDG) in said RAM, and said set of instructions are implemented to operate as a middleware software hierarchy on a computer executing said data intensive computing application.

20. The set of machine-readable instructions of claim 19, wherein:

said data intensive computing application comprises a MapReduce middleware module executable on said computer, said MapReduce middleware module including a TaskTracker control function;

said sensor comprises a disk cache sensor (DCS) that monitors an available size of said disk cache, and

said controller comprises;

a Hannibal Actuator (HA) that interacts with said TaskTracker to work in a hybrid mode wherein intermediate data is stored in said IMDG; and

a Hannibal Controller (HC) having a function that, when said DCS reports insufficient disk cache, sets a maximum amount of memory that can be used to store intermediate data, and a function that interfaces with said HA to enter into said hybrid mode, and

wherein said DCS, said HA, and said HC are implemented as classes in said TaskTracker control function.