HIGH-EFFICIENCY PHOTOVOLTAIC BACK-CONTACT SOLAR CELL STRUCTURES AND MANUFACTURING METHODS USING THIN PLANAR SEMICONDUCTOR ABSORBERS

• US 20120305063A1
• Filed: 12/09/2010
• Published: 12/06/2012
• Est. Priority Date: 12/09/2009
• Status: Active Grant

• Current Assignee: Ob Realty, LLC
• Original Assignee: Solexel, Inc.
• Inventors: Moslehi, Mehrdad M., Kapur, Pawan, Kramer, Karl-Josef, Wang, David Xuan-Qi, Seutter, Sean M., Calcaterra, Anthony, Rana, Virenda V., Van Kerschaver, Emmanuel
• Granted Patent: US 8,962,380 B2
• Time in Patent Office: Days
• US Class Current: 136/256
• CPC Class Codes: H01L 31/0201 comprising specially adapted module bus-bar structures
• CPC Class Codes: H01L 31/02167 for solar cells
• CPC Class Codes: H01L 31/022441 Electrode arrangements specially adapted for back-contact solar cells
• CPC Class Codes: H01L 31/022458 for emitter wrap-through [EWT] type solar cells, e.g. interdigitated emitter-base back-contacts
• CPC Class Codes: H01L 31/0236 Special surface textures
• CPC Class Codes: H01L 31/02363 of the semiconductor body itself, e.g. textured active layers
• CPC Class Codes: H01L 31/035281 Shape of the body
• CPC Class Codes: H01L 31/03529 Shape of the potential jump barrier or surface barrier
• CPC Class Codes: H01L 31/03921 including only elements of Group IV of the Periodic Table
• CPC Class Codes: H01L 31/056 the light-reflecting means being of the back surface reflector [BSR] type
• CPC Class Codes: H01L 31/068 the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
• CPC Class Codes: H01L 31/0682 back-junction, i.e. rearside emitter, solar cells, e.g. interdigitated base-emitter regions back-junction cells
• CPC Class Codes: H01L 31/18 Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
• CPC Class Codes: H01L 31/1804 comprising only elements of Group IV of the Periodic Table
• CPC Class Codes: H01L 31/1892 methods involving the use of temporary, removable substrates
• CPC Class Codes: Y02E 10/52 PV systems with concentrators
• CPC Class Codes: Y02E 10/547 Monocrystalline silicon PV cells
• CPC Class Codes: Y02P 70/50 Manufacturing or production processes characterised by the final manufactured product

Abstract

Back contact back junction solar cell and methods for manufacturing are provided. The back contact back junction solar cell comprises a substrate having a light capturing frontside surface with a passivation layer, a doped base region, and a doped backside emitter region with a polarity opposite the doped base region. A backside passivation layer and patterned reflective layer on the emitter form a light trapping backside mirror. An interdigitated metallization pattern is positioned on the backside of the solar cell and a permanent reinforcement provides support to the cell.

Claims

1. A back contact back junction thin solar cell, comprising:

a deposited semiconductor layer, comprising;

a light capturing frontside surface with a passivation layer,

a doped base region, and

a doped backside emitter region with a polarity opposite said doped base region;

a backside passivation dielectric layer and patterned reflective layer on said backside emitter region, wherein said backside passivation dielectric layer and said patterned reflective layer form a light trapping backside mirror;

backside emitter contacts and backside base contacts connected to metal interconnects forming a metallization pattern of interdigitated metallization pattern on the backside of said back contact back junction thin solar cell; and

at least one permanent support reinforcement positioned on the frontside or backside of said back contact back junction thin solar cell.

2. The back contact back junction thin solar cell of claim 1, wherein said deposited semiconductor layer is an epitaxial silicon layer with a thickness in the range of 15 to 50 microns.

3. The back contact back junction thin solar cell of claim 1, wherein said light capturing frontside surface with a passivation layer serves as an anti-reflection coating.

4. The back contact back junction thin solar cell of claim 1, wherein said light capturing frontside surface with a passivation layer provides field assisted passivation.

5. The back contact back junction thin solar cell of claim 1, wherein said doped backside emitter region is an in-situ doped epitaxial emitter region with an emitter junction thickness of less than 3 microns.

6. The back contact back junction thin solar cell of claim 1, wherein said interdigitated metallization pattern is a distributed array of interdigitated fingers and busbars.

7. The back contact back junction thin solar cell of claim 1, wherein higher concentration base doping regions under said backside base contacts are substantially separated from emitter regions, thereby forming separated junctions.

8. The back contact back junction thin solar cell of claim 1, wherein higher concentration base doping regions under said backside base contacts abut emitter regions, thereby forming abutted junctions.

9. The back contact back junction thin solar cell of claim 1, wherein said mirror is a lambertian mirror.

10. The back contact back junction thin solar cell of claim 1, wherein the localized doping concentrations under said emitter contact are substantially higher, thereby forming selective emitter contacts.

11. The back contact back junction thin solar cell of claim 1, wherein said permanent support reinforcement is a transparent frontside support reinforcement.

12. The back contact back junction thin solar cell of claim 1, wherein said permanent support reinforcement is a backside grid-shaped support reinforcement.

1-1. A thing. A back contact back junction thin solar cell, comprising:

a deposited semiconductor layer, comprising;

a light capturing frontside surface with a passivation layer,

a doped base region, and

a doped backside emitter region with a polarity opposite said doped base region;

a backside passivation dielectric layer and patterned reflective layer on said backside emitter region, wherein said backside passivation dielectric layer and said patterned reflective layer form a light trapping backside mirror;

backside emitter contacts and backside base contacts connected to metal interconnects forming a metallization pattern of interdigitated metallization pattern on the backside of said back contact back junction thin solar cell; and

at least one permanent support reinforcement positioned on the frontside or backside of said back contact back junction thin solar cell.

13. A back contact back junction thin solar cell, comprising:

a planar epitaxial silicon layer with a thickness in the range of 15 to 50 microns, comprising;

a textured frontside surface with an anti-reflection coating providing field assisted passivation,

a doped base region, and

a doped backside epitaxial emitter region with a polarity opposite said doped base region;

a backside passivation dielectric layer and patterned reflective layer on said backside emitter region, wherein said backside passivation dielectric layer and said patterned reflective layer form a lambertian mirror;

backside emitter contacts and backside base contacts connected to metal interconnects forming an interdigitated metallization pattern on the backside of said back contact back junction thin solar cell; and

a permanent transparent frontside support reinforcement positioned on the frontside of said back contact back junction thin solar cell.

14. A back contact back junction thin solar cell, comprising:

a planar epitaxial silicon layer with a thickness in the range of 15 to 50 microns, comprising;

a textured frontside surface with an anti-reflection coating providing field assisted passivation,

a doped base region, and

a doped backside epitaxial emitter region with a polarity opposite said doped base region;

a backside passivation dielectric layer and patterned reflective layer on said backside emitter region, wherein said backside passivation dielectric layer and said patterned reflective layer form a lambertian mirror;

backside emitter contacts and backside base contacts connected to metal interconnects forming a metallization pattern of interdigitated fingers and busbars on the backside of said back contact back junction thin solar cell; and

a permanent grid-shaped backside support reinforcement positioned on the backside of said back contact back junction thin solar cell.

15. A method for the manufacture of a back contact back junction thin solar cell from a crystalline semiconductor layer, the method providing structural support to said crystalline semiconductor layer, the method comprising:

forming a porous semiconductor layer on a template, wherein said template provides structural support and acts as a high temperature temporary carrier for back contact back junction solar cell backside processing steps, said backside processing steps comprising;

depositing a doped base crystalline semiconductor layer on said porous semiconductor layer;

forming a doped emitter layer on said doped base crystalline semiconductor layer;

depositing a backside passivation dielectric layer on said doped emitter layer;

forming backside base and emitter contact openings through said dielectric layer in an interdigitated finger pattern; and

doping exposed base regions to form doped base contact regions;

separating said doped base crystalline semiconductor layer from said template along said porous semiconductor layer, wherein a cell backside temporary carrier is attached to said solar cell backside prior to release to provide support for cell frontside processing steps, said frontside processing step comprising forming a light capturing frontside surface with a passivation layer;

attaching a transparent permanent reinforcement support to the cell frontside and releasing said cell backside temporary carrier; and

metalizing the cell backside to form interdigitated backside base and emitter metallization.

16. The method of claim 15, wherein the step of depositing a doped base crystalline semiconductor layer further comprises depositing a doped base epitaxial silicon layer with a thickness in the range of 15 to 50 microns.

17. The method of claim 15, wherein the step of forming a doped emitter layer on said doped base crystalline semiconductor layer further comprises forming a doped emitter epitaxial layer.

18. The method of claim 15, further comprising the step of etching a trench pattern in said emitter layer exposing said underlying doped base semiconductor layer for the formation of said doped base regions.

19. The method of claim 15, wherein laser ablation is used to form backside base and emitter contact openings through said dielectric layer in an interdigitated finger pattern.

20. The method of claim 15, wherein said interdigitated finger pattern is a distributed busbar array.

21. A method for the manufacture of a back contact back junction thin solar cell from a crystalline semiconductor layer, the method providing continuous structural support to said crystalline semiconductor layer, the method comprising:

forming a porous semiconductor layer on a template, wherein said template provides structural support and acts as a high temperature temporary carrier for back contact back junction solar cell backside processing steps, said backside processing steps comprising;

depositing a doped base crystalline semiconductor layer on said porous semiconductor layer;

forming a doped emitter layer on said doped base crystalline semiconductor layer;

depositing a backside passivation dielectric layer on said doped emitter layer;

forming backside base and emitter contact openings through said dielectric layer in an interdigitated finger pattern; and

doping exposed regions to form emitter regions and base regions;

separating said doped base crystalline semiconductor layer from said template along said porous semiconductor layer, wherein a permanent cell backside support is attached to said solar cell backside prior to release to provide support for cell processing steps comprising;

forming a light capturing frontside surface with a passivation layer; and

metalizing the cell backside to form backside base and emitter contacts in the pattern of interdigitated fingers and busbars.

22. The method of claim 21, wherein the step of depositing a doped base crystalline semiconductor layer further comprises depositing a doped base epitaxial silicon layer with a thickness in the range of 15 to 50 microns.

23. The method of claim 21, wherein the step of forming a doped emitter layer on said doped base crystalline semiconductor layer further comprises forming a doped emitter epitaxial layer.

24. The method of claim 21, further comprising the step of etching a trench pattern in said emitter layer exposing said underlying doped base semiconductor layer for the formation of said doped base regions.

25. The method of claim 21, wherein laser ablation is used to form backside base and emitter contact openings through said dielectric layer in an interdigitated finger pattern.

26. The method of claim 21, wherein said interdigitated finger pattern is a distributed busbar array.

27. The method of claim 21, wherein said permanent cell backside support is grid-shaped.