Control of Digital Voltage and Frequency Scaling Operating Points
First Claim
1. A method of generating a clock signal to be supplied to electronic circuitry, the method comprising:
- generating, based on which one of a plurality of application use cases capable of being carried out by the electronic circuitry is presently active, a first signal that indicates a first selected one of a plurality of clock signal operating points;
generating, based on a present speed requirement of the electronic circuitry, a second signal that indicates a second selected one of the plurality of clock signal operating points;
generating, based on the first and second signals, a third signal that indicates which of the plurality of clock signal operating points should be active, wherein the clock signal operating point indicated by the third signal is whichever one of the clock signal operating points indicated by the first and second signals is associated with a higher clock signal frequency; and
using the third signal to control generation of a clock signal having the operating point indicated by the third signal,wherein for any given one of the application use cases, the present speed requirement need not remain constant for the duration of the given one of the application use cases.
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Accused Products
Abstract
A clock signal for electronic circuitry is generated by generating, based on which one of a plurality of application use cases is presently active, a first signal that indicates a first selected one of a plurality of clock signal operating points. Based on the electronic circuitry'"'"'s present speed requirement, a second signal is generated that indicates a second selected one of the clock signal operating points. For any given one of the application use cases, the speed requirement need not remain constant for the duration of the application use case. Based on whichever one of the first and second signals is associated with a higher clock frequency operating point, a third signal is generated that indicates which clock signal operating point (and possibly what voltage level) should be active. The third signal controls generation of a clock (and possibly also voltage level).
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Citations
26 Claims
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1. A method of generating a clock signal to be supplied to electronic circuitry, the method comprising:
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generating, based on which one of a plurality of application use cases capable of being carried out by the electronic circuitry is presently active, a first signal that indicates a first selected one of a plurality of clock signal operating points; generating, based on a present speed requirement of the electronic circuitry, a second signal that indicates a second selected one of the plurality of clock signal operating points; generating, based on the first and second signals, a third signal that indicates which of the plurality of clock signal operating points should be active, wherein the clock signal operating point indicated by the third signal is whichever one of the clock signal operating points indicated by the first and second signals is associated with a higher clock signal frequency; and using the third signal to control generation of a clock signal having the operating point indicated by the third signal, wherein for any given one of the application use cases, the present speed requirement need not remain constant for the duration of the given one of the application use cases. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13)
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14. An apparatus for generating a clock signal to be supplied to electronic circuitry, the apparatus comprising:
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circuitry configured to generate, based on which one of a plurality of application use cases capable of being carried out by the electronic circuitry is presently active, a first signal that indicates a first selected one of a plurality of clock signal operating points; circuitry configured to generate, based on a present speed requirement of the electronic circuitry, a second signal that indicates a second selected one of the plurality of clock signal operating points; circuitry configured to generate, based on the first and second signals, a third signal that indicates which of the plurality of clock signal operating points should be active, wherein the clock signal operating point indicated by the third signal is whichever one of the clock signal operating points indicated by the first and second signals is associated with a higher clock signal frequency; and circuitry configured to use the third signal to control generation of a clock signal having the operating point indicated by the third signal, wherein for any given one of the application use cases, the present speed requirement need not remain constant for the duration of the given one of the application use cases. - View Dependent Claims (15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26)
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Specification