HIGH FREQUENCY INTERCONNECT STRUCTURES, ELECTRONIC ASSEMBLIES THAT UTILIZE HIGH FREQUENCY INTERCONNECT STRUCTURES, AND METHODS OF OPERATING THE SAME

• US 20120306587A1
• Filed: 05/31/2012
• Published: 12/06/2012
• Est. Priority Date: 06/03/2011
• Status: Active Grant

• Current Assignee: FormFactor Incorporated
• Original Assignee: Cascade Microtech Incorporated (FormFactor Incorporated)
• Inventors: Strid, Eric W., Campbell, Richard L., Smith, Kenneth R., Gleason, K. Reed, Jung, Kooho
• Granted Patent: US 9,372,214 B2
• Time in Patent Office: Days
• US Class Current: 333/1
• CPC Class Codes: G01R 23/02 Arrangements for measuring frequency, e.g. pulse repetition rate; Arrangements for measuring period of current or voltage
• CPC Class Codes: H01P 3/16 Dielectric waveguides, i.e. without a longitudinal conductor
• CPC Class Codes: H01P 3/18 built-up from several layers to increase operating surface, i.e. alternately conductive and dielectric layers

Abstract

High frequency interconnect structures, electronic assemblies that utilize high frequency interconnect structures, and methods of operating the same. The high frequency interconnect structures include a plurality of dielectric waveguides and are configured to communicatively connect a plurality of transmitters with a plurality of receivers and to convey a plurality of signals therebetween. The plurality of signals may include a plurality of electromagnetic waves and may have a frequency of at least 200 GHz. The high frequency interconnect structures further may be configured to decrease a potential for crosstalk between a first signal that is conveyed by a first dielectric waveguide of the plurality of dielectric waveguides and a second signal that is conveyed by a second dielectric waveguide of the plurality of dielectric waveguides, such as through control of a passband of the first dielectric waveguide relative to the second dielectric waveguide and/or the use of a crosstalk mitigation structure.

Claims

1. A high frequency interconnect structure that is configured to communicatively connect a plurality of transmitters and a plurality of receivers, the high frequency interconnect structure comprising:

a plurality of dielectric waveguides, wherein the plurality of dielectric waveguides is configured to convey a plurality of signals from the plurality of transmitters to the plurality of receivers, wherein the plurality of signals includes a plurality of electromagnetic waves, and further wherein the plurality of signals includes a frequency of at least 200 GHz.

2. The high frequency interconnect structure of claim 1, wherein the plurality of dielectric waveguides is formed from a dielectric material, wherein a dielectric constant of at least a portion of the plurality of dielectric waveguides is at least 2 and less than 10.

3. The high frequency interconnect structure of claim 1, wherein at least a portion of the plurality of dielectric waveguides includes a rectangular dielectric waveguide.

4. The high frequency interconnect structure of claim 3, wherein a width of the rectangular dielectric waveguide is approximately one-half a wavelength of a signal of the plurality of signals that is conveyed thereby, and further wherein a height of the rectangular dielectric waveguide is approximately one-fourth of the wavelength of the signal of the plurality of signals that is conveyed thereby.

5. The high frequency interconnect structure of claim 3, wherein at least one of a width and a height of the rectangular dielectric waveguide is greater than 50 nm and less than 200 um.

6. The high frequency interconnect structure of claim 1, wherein at least a portion of the plurality of dielectric waveguides includes a slot dielectric waveguide.

7. The high frequency interconnect structure of claim 1, wherein the plurality of dielectric waveguides includes a first dielectric waveguide and a second dielectric waveguide, wherein the first dielectric waveguide is configured to convey a first signal of the plurality of signals at a first frequency, wherein the second dielectric waveguide is configured to convey a second signal of the plurality of signals at a second frequency, wherein the first frequency is different from the second frequency, and further wherein the first dielectric waveguide is adjacent to the second dielectric waveguide.

8. The high frequency interconnect structure of claim 7, wherein the first dielectric waveguide is configured such that the second signal will not propagate therein, and further wherein the second dielectric waveguide is configured such that the first signal will not propagate therein.

9. The high frequency interconnect structure of claim 1, wherein the high frequency interconnect structure includes a crosstalk mitigation structure, wherein the crosstalk mitigation structure is configured to decrease crosstalk between a first signal of the plurality of signals that is conveyed by a first dielectric waveguide of the plurality of dielectric waveguides and a second signal of the plurality of signals that is conveyed by a second dielectric waveguide of the plurality of dielectric waveguides, and further wherein the crosstalk mitigation structure at least one of (1) is located between the first dielectric waveguide and the second dielectric waveguide and (2) optically separates the first dielectric waveguide from the second dielectric waveguide.

10. The high frequency interconnect structure of claim 9, wherein the crosstalk mitigation structure includes an absorbing material, and further wherein the absorbing material is configured to absorb a portion of a signal of the plurality of signals that is present outside a respective dielectric waveguide of the plurality of dielectric waveguides.

11. The high frequency interconnect structure of claim 10, wherein the absorbing material includes a metallic structure.

12. The high frequency interconnect structure of claim 11, wherein the metallic structure is further configured to convey an electric signal between a first electronic device that includes at least one of (1) a first portion of the plurality of transmitters and (2) a first portion of the plurality of receivers, and a second electronic device that includes at least one of (1) a second portion of the plurality of transmitters and (2) a second portion of the plurality of receivers.

13. The high frequency interconnect structure of claim 1, wherein the high frequency interconnect structure includes a plurality of layers, wherein each of the plurality of layers includes a portion of the plurality of dielectric waveguides.

14. The high frequency interconnect structure of claim 13, wherein the high frequency interconnect structure includes a crosstalk mitigation structure, and further wherein the crosstalk mitigation structure is located between at least a portion of the plurality of layers.

15. The high frequency interconnect structure of claim 13, wherein the high frequency interconnect structure includes a first dielectric waveguide of the plurality of dielectric waveguides that is configured to convey a first signal of the plurality of signals at a first frequency, wherein the high frequency interconnect structure includes a second dielectric waveguide of the plurality of dielectric waveguides that is configured to convey a second signal of the plurality of signals at a second frequency, wherein the first frequency is different from the second frequency, wherein the first dielectric waveguide is adjacent to the second dielectric waveguide, and further wherein the first dielectric waveguide and the second dielectric waveguide are located in a common layer of the plurality of layers.

16. The high frequency interconnect structure of claim 1, further including a cladding material that surrounds and optically separates at least a portion of the plurality of dielectric waveguides.

17. The high frequency interconnect structure of claim 1, wherein the plurality of dielectric waveguides includes at least 100 dielectric waveguides.

18. An electronic assembly, comprising:

a first electronic device;

a second electronic device; and

the high frequency interconnect structure of claim 1, wherein the high frequency interconnect structure is configured to communicatively connect a plurality of transmitters and a plurality of receivers, wherein the first electronic device includes at least one of a first portion of the plurality of transmitters and a first portion of the plurality of receivers, and further wherein the second electronic device includes at least one of a second portion of the plurality of transmitters and a second portion of the plurality of receivers.

19. The electronic assembly of claim 18, wherein at least one of the first electronic device and the second electronic device is configured for at least one of direct launch of a portion of the plurality of signals and direct receipt of the portion of the plurality of signals.

20. The electronic assembly of claim 18, wherein a distance between the first electronic device and the second electronic device is at least 1 m and less than 100 m, and further wherein the first electronic device is located within a first server rack and the second electronic device is located within a second server rack that is different from the first server rack.

21. The electronic assembly of claim 18, wherein a distance between the first electronic device and the second electronic device is at least 0.5 m and less than 1 m, and further wherein the first electronic device is located on a first circuit board and the second electronic device is located on a second circuit board that is different from the first circuit board.

22. The electronic assembly of claim 18, wherein a distance between the first electronic device and the second electronic device is at least 0.1 cm and less than 50 cm, and further wherein the first electronic device forms a portion of a first integrated circuit chip and the second electronic device forms a portion of a second integrated circuit chip that is different from the first integrated circuit chip.

23. The electronic assembly of claim 18, wherein a distance between the first electronic device and the second electronic device is less than 20 cm, and further wherein the first electronic device includes a first integrated circuit on an integrated circuit chip and the second electronic device includes a second integrated circuit on the integrated circuit chip.

24. The electronic assembly of claim 18, wherein the electronic assembly further includes an interfacing structure configured to convey at least a portion of the plurality of signals between the high frequency interconnect structure and at least one of the first electronic device and the second electronic device, wherein the interfacing structure is configured to reduce a coupling loss between the high frequency interconnect structure and at least one of the first electronic device and the second electronic device, and further wherein the interfacing structure is configured to decrease crosstalk among the plurality of signals that is conveyed by the plurality of dielectric waveguides.

25. The electronic assembly of claim 18, wherein the plurality of transmitters includes a plurality of signal launch structures that is configured to convey the plurality of signals from the plurality of transmitters to the plurality of dielectric waveguides, and further wherein the plurality of receivers includes a plurality of signal receiving structures that is configured to receive the plurality of signals from the plurality of dielectric waveguides.

26. The electronic assembly of claim 25, wherein at least one of the plurality of signal launch structures and the plurality of signal receiving structures includes a plurality of antennae, and further wherein the plurality of antennae includes at least one of a plurality of resonant antennae, a plurality of differentially excited pairs of conductors, a plurality of half-wave dipole antennae, and a plurality of differential patch antennae.

27. The electronic assembly of claim 18, wherein the plurality of transmitters includes a plurality of voltage-controlled oscillators, and further wherein the plurality of voltage-controlled oscillators is configured to be frequency modulated by a plurality of digital input signals.

28. The electronic assembly of claim 18, wherein the plurality of signals includes a plurality of binary data signals that includes a plurality of “

0”

data states and a plurality of “

1”

data states, wherein the plurality of dielectric waveguides is configured to convey a first portion of the plurality of binary data signals that corresponds to one of the “

0”

data state and the “

1”

data state and to attenuate a second portion of the plurality of binary data signals that corresponds to the other of the “

0”

data state and the “

1”

data state, and further wherein the attenuation includes attenuating the second portion of the plurality of binary data signals by at least 6 dB.

29. The electronic assembly of claim 18, wherein at least one of the first electronic device and the second electronic device includes at least one of an integrated circuit, a three-dimensional integrated circuit, a device under test, an optoelectronic launch chip, a probe head, and a probing system.

30. The electronic assembly of claim 18, wherein the electronic assembly further includes an integrated circuit device, wherein the first electronic device includes a launch chip, and further wherein the launch chip is configured to form a plurality of electrical connections with the integrated circuit device and to convey the plurality of signals between the integrated circuit device and the second electronic device via the plurality of electrical connections.

31. The electronic assembly of claim 18, wherein the first electronic device and the high frequency interconnect structure form a portion of a probe head assembly, wherein the second electronic device includes a device under test, and further wherein the probe head assembly is configured to convey the plurality of signals between a test system that includes the probe head assembly and the device under test.

32. The electronic assembly of claim 18, wherein the first electronic device includes a first integrated circuit device, wherein the second electronic device includes a second integrated circuit device, and further wherein the first integrated circuit device and the second integrated circuit device form a portion of a three-dimensional integrated circuit device.