BASEBAND / RFIC INTERFACE FOR HIGH THROUGHPUT MIMO COMMUNICATIONS

• US 20120307876A1
• Filed: 08/20/2012
• Published: 12/06/2012
• Est. Priority Date: 11/11/2005
• Status: Active Grant

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: Trachewsky, Jason A., Behzad, Arya Reza
• Granted Patent: US 8,478,336 B2
• Time in Patent Office: Days
• US Class Current: 375/219
• CPC Class Codes: H04B 1/0003 Software-defined radio [SDR] systems, i.e. systems wherein components typically implemented in hardware, e.g. filters or modulators/demodulators, are implented using software, e.g. by involving an AD or DA conversion stage such that at least part of the signal processing is performed in the digital domain digital baseband systems H04L25/00; digital modulation/demodulation H04L27/00; CDMA H04B1/707; TDMA H04B7/2643; image transmission H04N5/00

Abstract

Analog signal paths are utilized between a baseband processor and a radio front end to support high throughput communications for a multiple in multiple out radio transceiver that support communications over two or more antennas. Specifically, analog differential I and Q path communication signals are exchanged between a radio front end core and a baseband processor to maximize throughput capacity for high data rate signals. Along the same lines, the impedances of traces and the interface are matched to reduce I/Q imbalance.

Claims

1. A multiple-input-multiple-output (MIMO) radio transceiver, comprising:

a plurality of front end cores, each servicing respective receive in-phase and quadrature phase differential signals and transmit in-phase and quadrature phase differential signals of a plurality of MIMO signals; and

a MIMO signal interface coupling the plurality of front end cores to at least one baseband processor.

2. The MIMO radio transceiver of claim 1, further comprising a plurality of Analog to Digital Converters (ADCs), each servicing a respective differential signal path.

3. The MIMO radio transceiver of claim 1, further comprising a plurality of Digital to Analog Converters (DACs), each servicing a respective differential signal path.

4. The MIMO radio transceiver of claim 1:

wherein at least one front end core of the plurality of front end cores comprises two Rx/Tx processing blocks; and

further comprising sixteen differential analog signal paths coupling the at least one front end core to the at least one baseband processor.

5. The MIMO radio transceiver of claim 1:

wherein the plurality of front end cores comprise four Rx/Tx processing blocks; and

further comprising thirty-two differential analog signal paths coupling the plurality of front end cores to the at least one baseband processor.

6. The MIMO radio transceiver of claim 1, further comprising a plurality of antennas operable to concurrently service at least two active communication links.

7. The MIMO radio transceiver of claim 1, wherein each in-phase and quadrature phase transmit path is impedance matched to reduce I/Q imbalance.

8. The MIMO radio transceiver of claim 1, wherein the MIMO signal interface is operable to service both ingoing and outgoing differential signals during overlapping signal periods.

9. A method for operating a multiple-input-multiple-output (MIMO) transceiver comprising:

at each of a plurality of front end cores of the MIMO transceiver, servicing respective receive in-phase and quadrature phase differential signals and transmit in-phase and quadrature phase differential signals of a plurality of MIMO signals; and

by a MIMO signal interface, coupling the plurality of front end cores to at least one baseband processor.

10. The method of claim 9, further comprising respective differential signal path by a plurality of Analog to Digital Converters (ADCs).

11. The method of claim 9, further comprising servicing a respective differential signal path by a plurality of Digital to Analog Converters (DACs).

12. The method of claim 9, further comprising coupling the at least one front end core to the at least one baseband processor by sixteen differential analog signal paths.

13. The method of claim 9, further comprising coupling four Rx/Tx processing blocks of the at least one front end core to the at least one baseband processor by thirty-two differential analog signal paths.

14. The method of claim 9, further comprising concurrently servicing at least two active communication links via a plurality of antennas.

15. The method of claim 9, further comprising impedance matching each in-phase and quadrature phase transmit path to reduce I/Q imbalance.

16. The method of claim 9, further comprising servicing both ingoing and outgoing differential signals during overlapping signal periods.

17. A multiple-input-multiple-output (MIMO) radio transceiver, comprising:

a plurality of front end cores, each comprising at least two Rx/Tx processing blocks and servicing respective receive in-phase and quadrature phase differential signals and transmit in-phase and quadrature phase differential signals of a plurality of MIMO signals; and

a MIMO signal interface coupling the plurality of front end cores to at least one baseband processor, the MIMO signal interface comprising, for each front end core, at least sixteen differential analog signal paths coupling the front end core to the at least one baseband processor.

18. The MIMO radio transceiver of claim 17, further comprising a plurality of antennas operable to concurrently service at least two active communication links.

19. The MIMO radio transceiver of claim 17, wherein each in-phase and quadrature phase transmit path is impedance matched to reduce I/Q imbalance.

20. The MIMO radio transceiver of claim 17, further comprising a plurality of Analog to Digital Converters (ADCs), each servicing a respective differential signal path.