PROCESSOR CORE POWER MANAGEMENT TAKING INTO ACCOUNT THREAD LOCK CONTENTION

• US 20120311605A1
• Filed: 05/31/2011
• Published: 12/06/2012
• Est. Priority Date: 05/31/2011
• Status: Abandoned Application

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Olszewski, Bret R., Vaidyanathan, Basu
• Application Number:
  US13/149,492
• Publication Number:
  US 20120311605A1
• Time in Patent Office: Days
• US Class Current: 718/107
• CPC Class Codes: G06F 9/5094 where the allocation takes into account power or heat criteria power management in computers in general G06F1/3203; thermal management in computers in general G06F1/206
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

A method maintains, for each processing element in a processor, a count of threads waiting in a data structure for hand-off locks in order to execute on the processing element. The method maintains the processing element in a first power state if the count of threads waiting for hand-off locks is greater than zero. The method puts the processing element in a second power state if the count of threads waiting for hand-off locks is equal to zero and no thread is ready to be processed by the processing element. The method returns the processing element to the first power state if the count of threads becomes greater than zero, or if a thread becomes ready to be processed by the processing element.

Claims

1. A method, which comprises:

maintaining, for each processing element in a processor, a count of threads waiting in a data structure for hand-off locks in order to execute on said processing element; and

,

maintaining said processing element in a first power state if said count of threads is greater than zero.

2. The method as claimed in claim 1, including putting said processing element in a second power state if said count of threads is equal to zero and no thread is ready to be processed by said processing element.

3. The method as claimed in claim 2, including returning said processing element to said first power state if said count of threads becomes greater than zero.

4. The method as claimed in claim 2, including returning said processing element to said first power state if a thread becomes ready to be processed by said processing element.

5. The method as claimed in claim 1, wherein said maintaining said count of threads includes incrementing said count of threads when a thread waiting for a hand-off lock is added to said data structure for said processing element.

6. The method as claimed in claim 1, wherein said maintaining said count of threads includes decrementing said count of threads when a thread waiting for a hand-off lock is removed from said data structure for said processing element.

7. The method as claimed in claim 1, wherein said processing element comprises a processor core.

8. A system, which comprises:

a data structure in a multi-processing element computer system for containing, for each processing element of said computer system, threads waiting for hand-off locks in order to execute on a processing element;

a counter for maintaining a count of threads waiting for hand-off locks in said data structure in order to execute on said processing element; and

,

a power control component arranged to maintain said processing element in a first power state if said count of threads in said data structure is greater than zero.

9. The system as claimed in claim 8, wherein said power control component is further arranged to put said processing element into a second power state if said count of threads is equal to zero and no thread is ready to be processed by said processing element.

10. The system as claimed in claim 9, wherein said power control component is further arranged to return said processing element to said first power state if said count of threads becomes greater than zero.

11. The system as claimed in claim 9, wherein said power control component is further arranged to return said processing element to said first power state if a thread becomes ready to be processed by said processing element.

12. The system as claimed in claim 8, wherein said counter is arranged to increment said count when a thread waiting for a hand-off lock is added to said data structure.

13. The system as claimed in claim 8, wherein said counter is arranged to decrement said count when a thread waiting for a hand-off lock is removed from said data structure.

14. The method as claimed in claim 8, wherein said processing element comprises a processor core.

15. A computer program product in computer readable storage medium, said computer program product comprising:

instructions stored in said computer readable storage medium for maintaining, for each processing element in a processor, a count of threads waiting in a data structure for hand-off locks in order to execute on said processing element; and

,

instructions stored in said computer readable storage medium for maintaining said processing element in a first power state if said count of threads is greater than zero.

16. The computer program product as claimed in claim 15, further comprising instructions stored in said computer readable storage medium for putting said processing element into a second power state if said count of threads is equal to zero and no thread is ready to be processed by said processing element.

17. The computer program product as claimed in claim 16, further comprising instructions stored in said computer readable storage medium for returning said processing element to said first power state if said count of threads becomes greater than zero.

18. The computer program product as claimed in claim 16, further comprising instructions stored in said computer readable storage medium for returning said processing element to said first power state if a thread becomes ready to be processed by said processing element.

19. The computer program product as claimed in claim 15, wherein said maintaining said count of threads includes incrementing said count of threads when a thread waiting for a hand-off lock is added to said data structure for said processing element.

20. The computer program product as claimed in claim 15, wherein said maintaining said count of threads includes decrementing said count of threads when a thread waiting for a hand-off lock is removed from said data structure for said processing element.