GREEN COMPUTING HETEROGENEOUS COMPUTER SYSTEM

• US 20120317429A1
• Filed: 11/21/2011
• Published: 12/13/2012
• Est. Priority Date: 06/08/2011
• Status: Abandoned Application

• Current Assignee: Institute For Information Industry
• Original Assignee: Institute For Information Industry
• Inventors: CHANG, Teng-Chang
• Application Number:
  US13/301,313
• Publication Number:
  US 20120317429A1
• Time in Patent Office: Days
• US Class Current: 713/320
• CPC Class Codes: G06F 1/3293 by switching to a less power-consuming processor, e.g. sub-CPU
• CPC Class Codes: G06F 9/45533 Hypervisors; Virtual machine monitors
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

A green computing heterogeneous computer system for executing software has at least one performance processor, a processor supporting logic supporting the at least one performance processor for executing tasks of the software, and a hypervisor processor that consumes less power than the at least one performance processor. Supported by the processor supporting logic, the hypervisor processor executes tasks of the software that the hypervisor processor has sufficient processing power to handle and puts the at least one performance processor to a power-conserving state. The hypervisor processor brings the at least one performance processor out of idle state to execute tasks of the software that the hypervisor processor has insufficient processing power to handle. The at least one performance and hypervisor processors simultaneously execute tasks of the software that require combined processing power of all processors.

Claims

1. A heterogeneous computer system for executing software comprising:

at least one performance processor;

a processor supporting logic supporting said at least one performance processor for executing tasks of said software; and

a hypervisor processor consuming less power than said at least one performance processor;

wherein

said hypervisor processor, supported by said processor supporting logic, executing tasks of said software that said hypervisor processor has sufficient processing power to handle and putting said at least one performance processor to a power-conserving state;

said hypervisor processor bringing up said at least one performance processor out of said power-conserving state to execute tasks of said software that said hypervisor processor has insufficient processing power to handle;

or

said at least one performance and hypervisor processors simultaneously executing tasks of said software that require combined processing power of all processors.

2. The heterogeneous computer system of claim 1 wherein each of said at least one performance processor and said hypervisor processor are x86 processors and are on the same semiconductor chip.

3. The heterogeneous computer system of claim 1 wherein each of said at least one performance processor is an x86 processor, said hypervisor processor is an ARM processor and all are on the same semiconductor chip.

4. A heterogeneous computer system for executing software comprising:

at least one performance processor having a local processor bus;

a processor supporting logic supporting said at least one performance processor for executing tasks of said software;

a hypervisor processor consuming less power than said at least one performance processor; and

a bridge logic connecting said hypervisor processor to said processor supporting logic via said local processor bus;

wherein

said hypervisor processor, supported by said processor supporting logic connected via said bridge logic, executing tasks of said software that said hypervisor processor has sufficient processing power to handle and putting said at least one performance processor to a power-conserving state;

said hypervisor processor bringing said at least one performance processor out of said power-conserving state to execute tasks of said software that said hypervisor processor has insufficient processing power to handle;

or

said at least one performance and hypervisor processors simultaneously executing tasks of said software that require combined processing power of both processors.

5. The heterogeneous computer system of claim 4 wherein said bridge logic is on an independent semiconductor chip.

6. The heterogeneous computer system of claim 4 wherein said bridge logic is on the same semiconductor chip as that of said hypervisor processor.

7. The heterogeneous computer system of claim 4 wherein said bridge logic, said hypervisor processor and said at least one performance processor are on the same semiconductor chip.

8. The heterogeneous computer system of claim 4 wherein each of said at least one performance processor is an x86 processor.

9. The heterogeneous computer system of claim 5 wherein each of said at least one performance processor is an x86 processor.

10. The heterogeneous computer system of claim 6 wherein each of said at least one performance processor is an x86 processor.

11. The heterogeneous computer system of claim 7 wherein each of said at least one performance processor is an x86 processor.

12. The heterogeneous computer system of claim 4 wherein said hypervisor processor is an ARM processor.

13. The heterogeneous computer system of claim 5 wherein said hypervisor processor is an ARM processor.

14. The heterogeneous computer system of claim 6 wherein said hypervisor processor is an ARM processor.

15. The heterogeneous computer system of claim 7 wherein said hypervisor processor is an ARM processor.

16. A heterogeneous computer system for executing software comprising:

one or more first processors;

a processor supporting logic supporting said at least one first processor for executing tasks of said software; and

a second processor consuming less power than said one or more first processors;

wherein

said second processor, supported by said processor supporting logic, executing tasks of said software that said second processor has sufficient processing power to handle and putting said one or more first processors to a power-conserving state.

17. The heterogeneous computer system of claim 16 wherein said second processor is at a location different from that of said one or more first processors.

18. The heterogeneous computer system of claim 16 wherein one or more of said first processors is at a location different from the rest of said first and second processors.