SEMICONDUCTOR DEVICE AND A METHOD FOR MANUFACTURING THE SAME

• US 20120319175A1
• Filed: 06/14/2012
• Published: 12/20/2012
• Est. Priority Date: 06/16/2011
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: ENDO, Yuta, IMOTO, Yuki, YAMANE, Yasumasa, TAKABAYASHI, Yuko
• Granted Patent: US 8,766,329 B2
• Time in Patent Office: Days
• US Class Current: 257/255
• CPC Class Codes: H01L 29/045 by their particular orientation of crystalline planes
• CPC Class Codes: H01L 29/4908 for thin film semiconductor, e.g. gate of TFT
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/78603 characterised by the insulating substrate or support H01L29/78657 takes precedence
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

A transistor in which an electron state at an interface between an oxide semiconductor film and an underlayer film in contact with the oxide semiconductor film is favorable is provided. A value obtained by dividing a difference between nearest neighbor interatomic distance of the underlayer film within the interface and a lattice constant of the semiconductor film by the nearest neighbor interatomic distance of the underlayer film within the interface is less than or equal to 0.15. For example, an oxide semiconductor film is deposited over an underlayer film which contains stabilized zirconia which has a cubic crystal structure and has the (111) plane orientation, whereby the oxide semiconductor film including a crystal region having a high degree of crystallization can be provided directly on the underlayer film.

Claims

1. A semiconductor device comprising:

an underlayer film;

an oxide semiconductor film including a crystal region on the underlayer film;

a gate insulating film on the oxide semiconductor film;

a gate electrode overlapping with the oxide semiconductor film with the gate insulating film provided therebetween; and

a pair of electrodes at least partly in contact with the oxide semiconductor film,

wherein a value obtained by dividing a difference between nearest neighbor interatomic distance of the underlayer film within an interface where the underlayer film and the oxide semiconductor film are in contact with each other and a lattice constant of the oxide semiconductor film by the nearest neighbor interatomic distance of the underlayer film within the interface is less than or equal to 0.15.

2. The semiconductor device according to claim 1, wherein the underlayer film contains stabilized zirconia which has a cubic crystal structure and has (111) plane orientation.

3. The semiconductor device according to claim 1, wherein the oxide semiconductor film includes a crystal region having a hexagonal crystal structure and having a c-axis alignment.

4. The semiconductor device according to claim 3, wherein the lattice constant of the oxide semiconductor film is a-axis lattice constant.

5. A semiconductor device comprising:

a gate electrode;

a gate insulating film covering the gate electrode;

an oxide semiconductor film overlapping with the gate electrode on the gate insulating film, the oxide semiconductor film including a crystal region; and

a pair of electrodes at least partly in contact with the oxide semiconductor film,

wherein a value obtained by dividing a difference between nearest neighbor interatomic distance of the gate insulating film within an interface where the gate insulating film and the oxide semiconductor film are in contact with each other and a lattice constant of the oxide semiconductor film by the nearest neighbor interatomic distance of the gate insulating film within the interface is less than or equal to 0.15.

6. The semiconductor device according to claim 5, wherein the gate insulating film contains stabilized zirconia which has a cubic crystal structure and has (111) plane orientation.

7. The semiconductor device according to claim 5, wherein the oxide semiconductor film includes a crystal region having a hexagonal crystal structure and having a c-axis alignment.

8. The semiconductor device according to claim 7, wherein the lattice constant of the oxide semiconductor film is a-axis lattice constant.

9. A semiconductor device comprising:

an insulating layer containing stabilized zirconia which has a cubic crystal structure; and

an oxide semiconductor layer on the insulating layer, the oxide semiconductor layer including a crystal region,

wherein orientation of the insulating layer is (111) plane on an interface where the insulating layer and the oxide semiconductor layer are in contact with each other.

10. The semiconductor device according to claim 9, wherein a value obtained by dividing a difference between nearest neighbor interatomic distance of the insulating layer within the interface and a lattice constant of the oxide semiconductor layer by the nearest neighbor interatomic distance of the insulating layer within the interface is less than or equal to 0.15.

11. The semiconductor device according to claim 9, wherein the oxide semiconductor layer includes a crystal region having a hexagonal crystal structure and having a c-axis alignment.

12. The semiconductor device according to claim 11, wherein the lattice constant of the oxide semiconductor layer is a-axis lattice constant.

13. A method for manufacturing a semiconductor device, comprising the steps of:

forming a gate electrode over a substrate;

forming an insulating layer; and

forming an oxide semiconductor layer including a crystal region on the insulating layer,

wherein the insulating layer and the oxide semiconductor layer are in contact with each other,

wherein the gate electrode overlaps with the oxide semiconductor layer, and

wherein a value obtained by dividing a difference between nearest neighbor interatomic distance of the insulating layer within an interface where the insulating layer and the oxide semiconductor layer are in contact with each other and a lattice constant of the oxide semiconductor layer by the nearest neighbor interatomic distance of the insulating layer within the interface is less than or equal to 0.15.

14. The method for manufacturing a semiconductor device according to claim 13, wherein the insulating layer contains stabilized zirconia which has a cubic crystal structure and has (111) plane orientation.

15. The method for manufacturing a semiconductor device according to claim 13, wherein the oxide semiconductor layer includes a crystal region having a hexagonal crystal structure and having a c-axis alignment.

16. The method for manufacturing a semiconductor device according to claim 15, wherein the lattice constant of the oxide semiconductor layer is a-axis lattice constant.

17. The method for manufacturing a semiconductor device according to claim 13, further comprising a step of adding an ion reducing a resistance of the oxide semiconductor layer to a region of the semiconductor layer which does not overlap with the gate electrode.

18. The method for manufacturing a semiconductor device according to claim 13, wherein the insulating layer is deposited at a substrate surface temperature of higher than or equal to 100°

C. and lower than or equal to 500°

C.

19. The method for manufacturing a semiconductor device according to claim 13, wherein the oxide semiconductor layer is deposited at a substrate surface temperature of higher than or equal to 100°

C. and lower than or equal to 500°

C.

20. The method for manufacturing a semiconductor device according to claim 13, wherein the gate electrode is located below the oxide semiconductor layer with a gate insulating layer provided therebetween.

21. The method for manufacturing a semiconductor device according to claim 13, wherein the oxide semiconductor layer is located below the gate electrode with a gate insulating layer provided therebetween.