WIRING BOARD WITH BUILT-IN SEMICONDUCTOR ELEMENT

• US 20120319254A1
• Filed: 01/25/2011
• Published: 12/20/2012
• Est. Priority Date: 03/04/2010
• Status: Active Grant

• Current Assignee: NEC Corporation
• Original Assignee: NEC Corporation
• Inventors: Kikuchi, Katsumi, Yamamichi, Shintaro, Murai, Hideya, Mori, Kentaro, Nakashima, Yoshiki, Ohshima, Daisuke
• Granted Patent: US 8,766,440 B2
• Time in Patent Office: Days
• US Class Current: 257/659
• CPC Class Codes: H01L 21/568 Temporary substrate used as encapsulation process aid H01L21/4832 and H01L21/566 take precedence
• CPC Class Codes: H01L 2224/04105 Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
• CPC Class Codes: H01L 2224/06181 On opposite sides of the body
• CPC Class Codes: H01L 2224/2101 Structure
• CPC Class Codes: H01L 2224/221 Disposition
• CPC Class Codes: H01L 2224/24105 Connecting bonding areas at different heights
• CPC Class Codes: H01L 2224/24226 the HDI interconnect connecting to the same level of the item at which the semiconductor or solid-state body is mounted, e.g. the item being planar
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/73267 Layer and HDI connectors
• CPC Class Codes: H01L 2224/92244 the second connecting process involving a build-up interconnect
• CPC Class Codes: H01L 23/5389 the chips being integrally enclosed by the interconnect and support structures
• CPC Class Codes: H01L 24/19 Manufacturing methods of high density interconnect preforms
• CPC Class Codes: H01L 24/20 Structure, shape, material or disposition of high density interconnect preforms
• CPC Class Codes: H01L 24/23 Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
• CPC Class Codes: H01L 24/82 by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI] interconnection structure between a plurality of semiconductor chips H01L23/5389
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/01004 Beryllium [Be]
• CPC Class Codes: H01L 2924/01005 Boron [B]
• CPC Class Codes: H01L 2924/01006 Carbon [C]
• CPC Class Codes: H01L 2924/01013 Aluminum [Al]
• CPC Class Codes: H01L 2924/01019 : Potassium [K]
• CPC Class Codes: H01L 2924/01023 : Vanadium [V]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/0103 : Zinc [Zn]
• CPC Class Codes: H01L 2924/01032 : Germanium [Ge]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01042 : Molybdenum [Mo]
• CPC Class Codes: H01L 2924/01046 : Palladium [Pd]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/01073 : Tantalum [Ta]
• CPC Class Codes: H01L 2924/01074 : Tungsten [W]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/07802 : not being an ohmic electrical conductor
• CPC Class Codes: H01L 2924/10329 : Gallium arsenide [GaAs]
• CPC Class Codes: H01L 2924/12042 : LASER
• CPC Class Codes: H01L 2924/13091 : Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
• CPC Class Codes: H01L 2924/1461 : MEMS
• CPC Class Codes: H05K 1/186 : manufactured by mounting on or connecting to patterned circuits before or during embedding
• CPC Class Codes: H05K 3/4644 : by building the multilayer layer by layer, i.e. build-up multilayer circuits making via holes in the insulating layers H05K3/0011; special circuit boards as base or core whereon the multilayer is built H05K3/4602

Abstract

A wiring board including a built-in semiconductor element includes the semiconductor element, a peripheral insulating layer covering an outer peripheral side surface of the semiconductor element, an upper surface-side wiring provided on an upper surface side of the wiring board, and a lower surface-side wiring provided on a lower surface side of the wiring board. The semiconductor element includes a first wiring structure layer including a first wiring and a first insulating layer alternately provided on a semiconductor substrate, and a second wiring structure layer including a second wiring and a second insulating layer alternately provided on the first wiring structure layer. The upper surface-side wiring includes a wiring electrically connected to the first wiring via the second wiring. The second wiring is thicker than the first wiring and thinner than the upper surface-side wiring. The second insulating layer is formed of a resin material and is thicker than the first insulating layer.

Claims

1-28. -28. (canceled)

29. A wiring board including a built-in semiconductor element, the wiring board comprising:

the semiconductor element;

a peripheral insulating layer covering at least an outer peripheral side surface of the semiconductor element;

an upper surface-side wiring provided on an upper surface side of the wiring board; and

a lower surface-side wiring provided on a lower surface side of the wiring board,

wherein the semiconductor element comprises;

a semiconductor substrate;

a first wiring structure layer including a first wiring and a first insulating layer alternately provided on the semiconductor substrate; and

a second wiring structure layer including a second wiring and a second insulating layer alternately provided on the first wiring structure layer,

the upper surface-side wiring includes a wiring electrically connected to the first wiring via the second wiring,

the second wiring is thicker than the first wiring and thinner than the upper surface-side wiring, and

the second insulating layer is formed of a resin material and is thicker than the first insulating layer.

30. The wiring board according to claim 29, further comprising a base insulating layer, wherein the semiconductor element is provided on an upper surface side of the base insulating layer.

31. The wiring board according to claim 29, wherein the upper surface-side wiring comprises a fanout wiring led out from a position immediately above the semiconductor element to a peripheral area lying outside an outer edge of the semiconductor element, and the fanout wiring is electrically connected to the first wiring via the second wiring.

32. The wiring board according to claim 29, wherein the first wiring structure layer comprises an insulating layer formed of an inorganic insulating material, as the first insulating layer.

33. The wiring board according to claim 29, wherein the first wiring structure layer comprises an insulating layer formed of a low dielectric constant insulating material, as the first insulating layer.

34. The wiring board according to claim 29, wherein the second wiring structure layer comprises an insulating layer having a modulus of elasticity smaller than the first insulating layer, as the second insulating layer.

35. The wiring board according to claim 29, wherein the second wiring is at least twice as thick as the first wiring.

36. The wiring board according to claim 29, wherein the second insulating layer is at least twice as thick as the first insulating layer.

37. The wiring board according to claim 29, wherein the second wiring is formed based on a design rule different from a design rule for the first wiring, a design rule for the upper surface-side wiring and a design rule for the lower surface-side wiring, and

a minimum wiring width and a minimum wiring interval for the second wiring are respectively larger than a minimum wiring width and a minimum wiring interval for the first wiring, and smaller than a minimum wiring width and a minimum wiring interval for the upper surface-side wiring and a minimum wiring width and a minimum wiring interval for the lower surface-side wiring.

38. The wiring board according to claim 29, wherein an outer peripheral side surface of the second wiring structure layer is located inside an outer edge of an upper surface of the first wiring structure layer.

39. The wiring board according to claim 29, wherein the outer peripheral side surface of the second wiring structure layer is inclined inward and thus tapered.

40. The wiring board according to claim 31, wherein the first wiring structure layer comprises a first connection portion on an upper surface side thereof, the first connection portion being connected to the second wiring,

the second wiring structure layer comprises a second connection portion on an upper surface side thereof, the second connection portion being electrically continuous with the first connection portion and being connected to the fanout wiring, and

the second connection portion is relocated closer to an outer edge side of the semiconductor element than a position of the first connection portion.

41. The wiring board according to claim 31, further comprising a lateral-to-element via electrically connected to the fanout wiring in the peripheral insulating layer,

wherein the lower surface-side wiring is electrically connected to the fanout wiring via the lateral-to-element via.

42. The wiring board according to claim 29, further comprising a protective insulating film covering the upper surface-side wiring,

wherein the protective insulating film includes an opening, and the wiring board includes an external terminal formed of an exposed portion of the upper surface-side wiring in the opening, or an external terminal formed of a conductive portion provided in the opening.

43. The wiring board according to claim 31, further comprising a third wiring structure layer including a third wiring and a third insulating layer alternately provided on the wiring board,

wherein the third wiring structure layer includes the fanout wiring at least as a lowermost layer-side third wiring, and the fanout wiring is electrically connected to an upper layer-side third wiring.

44. The wiring board according to claim 43, wherein the second insulating layer is formed of a resin material containing no filler, and

the third wiring structure layer comprises, as the third insulating layer, an insulating layer formed of a resin material containing a filler.

45. The wiring board according to claim 43, wherein the third wiring is thicker than the second wiring, and the third insulating layer is thicker than the second insulating layer.

46. The wiring board according to claim 45, wherein the third wiring is at least twice as thick as the second wiring.

47. The wiring board according to claim 45, wherein the third insulating layer is at least twice as thick as the second insulating layer.

48. The wiring board according to claim 43, wherein the second wiring structure layer comprises an insulating layer having a modulus of elasticity larger than the third insulating layer, as the second insulating layer.

49. The wiring board according to claim 43, comprising an insulating layer with an opening on an uppermost layer side, and an external terminal formed of an exposed portion of the third wiring in the opening, or an external terminal formed of a conductive portion provided in the opening.

50. The wiring board according to claim 29, further comprising a fourth wiring structure layer including a fourth insulating layer and a fourth wiring alternately provided on a lower surface side of the wiring board, and

the fourth wiring structure layer includes the lower surface-side wiring as an uppermost layer-side fourth wiring.

51. The wiring board according to claim 50, comprising an insulating layer with an opening on a lowermost layer side;

and an external terminal formed of an exposed portion of the fourth wiring in the opening, or an external terminal formed of a conductive portion provided in the opening.

52. The wiring board according to claim 29, further comprising a protective insulating film covering the lower surface-side wiring,

wherein the protective insulating film includes an opening, and the wiring board includes an external terminal formed of an exposed portion of the lower surface-side wiring in the opening, or an external terminal formed of a conductive portion provided in the opening.

53. The wiring board according to claim 29, wherein a noise-shielded circuit pattern is provided on a lower surface side of the semiconductor element via an insulating adhesive material.

54. The wiring board according to claim 29, wherein a potential stabilization circuit pattern is provided on a lower surface side of the semiconductor element via a conductive adhesive material.

55. The wiring board according to claim 29, wherein the semiconductor element further comprises a fifth wiring structure layer comprising a fifth wiring and a fifth insulating layer, provided on the lower surface side of the semiconductor substrate.

56. The wiring board according to claim 55, wherein the fifth wiring is electrically connected to the fourth wiring.