Method of Producing a Radiation-Emitting Optoelectronic Component

• US 20120322178A1
• Filed: 08/28/2012
• Published: 12/20/2012
• Est. Priority Date: 09/30/2004
• Status: Active Grant

• Current Assignee: OSRAM OLED GMBH (Ams-Osram AG)
• Original Assignee: Osram Opto Semiconductors GmbH (Ams-Osram AG)
• Inventors: Guenther, Ewald Karl Michael, Sorg, Jörg Erich, Stath, Norbert
• Granted Patent: US 8,900,894 B2
• Time in Patent Office: Days
• US Class Current: 438/26
• CPC Class Codes: H01L 2224/24051 Conformal with the semiconductor or solid-state device
• CPC Class Codes: H01L 2224/24105 Connecting bonding areas at different heights
• CPC Class Codes: H01L 2224/24226 the HDI interconnect connecting to the same level of the item at which the semiconductor or solid-state body is mounted, e.g. the item being planar
• CPC Class Codes: H01L 2224/24998 Reinforcing structures, e.g. ramp-like support
• CPC Class Codes: H01L 2224/82007 involving a permanent auxiliary member being left in the finished device, e.g. aids for holding or protecting a build-up interconnect during or after the bonding process
• CPC Class Codes: H01L 2224/82039 using a laser
• CPC Class Codes: H01L 2224/82951 Forming additional members
• CPC Class Codes: H01L 24/24 of an individual high density interconnect connector
• CPC Class Codes: H01L 24/82 by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI] interconnection structure between a plurality of semiconductor chips H01L23/5389
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/01005 Boron [B]
• CPC Class Codes: H01L 2924/01006 Carbon [C]
• CPC Class Codes: H01L 2924/01013 Aluminum [Al]
• CPC Class Codes: H01L 2924/01023 Vanadium [V]
• CPC Class Codes: H01L 2924/01033 Arsenic [As]
• CPC Class Codes: H01L 2924/01049 Indium [In]
• CPC Class Codes: H01L 2924/01051 Antimony [Sb]
• CPC Class Codes: H01L 2924/01058 Cerium [Ce]
• CPC Class Codes: H01L 2924/01082 Lead [Pb]
• CPC Class Codes: H01L 2924/014 Solder alloys
• CPC Class Codes: H01L 2924/12036 : PN diode
• CPC Class Codes: H01L 2924/12041 : LED
• CPC Class Codes: H01L 2924/12042 : LASER
• CPC Class Codes: H01L 2924/351 : Thermal stress
• CPC Class Codes: H01L 33/508 : having a non-uniform spatial arrangement or non-uniform concentration, e.g. patterned wavelength conversion layer, wavelength conversion layer with a concentration gradient of the wavelength conversion material
• CPC Class Codes: H01L 33/52 : Encapsulations
• CPC Class Codes: H01L 33/54 : having a particular shape
• CPC Class Codes: H01L 33/62 : Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls

Abstract

In a method for producing a radiation-emitting optoelectronic component, a semiconductor chip is mounted by a first main area onto a carrier body and is electrically conductively connected at a first contact area to a first connection region, and a transparent electrically insulating encapsulation layer is applied to the chip and the carrier body. A first cutout in the encapsulation layer for at least partly uncovering a second contact area of the chip is produced, and a second cutout in the encapsulation layer for at least partly uncovering a second connection region of the carrier body is produced. Finally, an electrically conductive layer, which electrically conductively connects the second contact area of the semiconductor chip and the second connection region of the carrier body, is applied.

Claims

1. A method for producing an optoelectronic component which emits radiation in a main radiation direction, comprising a semiconductor chip having a first main area, a first contact area and a second main area, opposite the first main area, with a second contact area, and a carrier body having first and second connection regions, electrically insulated from one another, wherein the method comprises the steps of:

mounting the semiconductor chip by the first main area onto the carrier body and electrically conductively connecting the first contact area to the first connection region;

applying a transparent electrically insulating encapsulation layer to the semiconductor chip and the carrier body;

producing a first cutout in the encapsulation layer for at least partly uncovering the second contact area of the semiconductor chip, and producing a second cutout in the encapsulation layer for at least partly uncovering the second connection region of the carrier body; and

applying an electrically conductive layer, which electrically conductively connects the second contact area of the semiconductor chip and the second connection region of the carrier body.

2. The method as claimed in claim 1, wherein the encapsulation layer is a plastic layer.

3. The method as claimed in claim 1, wherein the encapsulation layer is applied by laminating on a film, printing on, spraying on or spin-coating.

4. The method as claimed in claim 1, wherein the encapsulation layer is a glass layer.

5. The method as claimed in claim 4, wherein the application of the encapsulation layer comprises the steps of:

applying a precursor layer containing inorganic and organic constituents;

removing the organic constituents from the precursor layer with a first thermal treatment; and

,

densifying the precursor layer into a glass layer with a second thermal treatment with a second thermal treatment.

6. The method as claimed in claim 1, wherein the first cutout and the second cutout are produced in the encapsulation layer by means of laser machining.

7. The method as claimed in claim 1, wherein in order to produce the electrically conductive layer, a metal layer is applied by a PVB method and is subsequently reinforced by means of electrode position.

8. The method as claimed in claim 1, wherein the electrically conductive layer is applied by a printing method.

9. The method as claimed in claim 1, wherein the electrically conductive layer is applied by spraying on or spin-coating.

10. The method as claimed in claim 1, wherein an electrically insulating cover layer is applied to the electrically conductive layer.

11. The method as claimed in claim 10, wherein the cover layer is a glass layer.

12. The method as claimed in claim 11, wherein the application of the cover layer comprises the steps of:

applying a precursor layer containing inorganic and organic constituents

removing the organic constituents from the precursor layer with a first thermal treatment; and

,

densifying the precursor layer into a glass layer with a second thermal treatment.