NEURAL MODELING AND BRAIN-BASED DEVICES USING SPECIAL PURPOSE PROCESSOR

• US 20120323832A1
• Filed: 02/24/2012
• Published: 12/20/2012
• Est. Priority Date: 06/28/2005
• Status: Abandoned Application

• Current Assignee: Neurosciences Research Foundation, Inc.
• Original Assignee: Neurosciences Research Foundation, Inc.
• Inventors: Snook, James A., Hutson, Donald B., Krichmar, Jeffrey L.
• Application Number:
  US13/404,996
• Publication Number:
  US 20120323832A1
• Time in Patent Office: Days
• US Class Current: 706/27
• CPC Class Codes: G06N 3/063 using electronic means
• CPC Class Codes: G06N 3/10 Interfaces, programming languages or software development kits, e.g. for simulating neural networks

Abstract

A special purpose processor (SPP) can use a Field Programmable Gate Array (FPGA) or similar programmable device to model a large number of neural elements. The FPGAs can have multiple cores doing presynaptic, postsynaptic, and plasticity calculations in parallel. Each core can implement multiple neural elements of the neural model.

Claims

1. A special purpose processor for implementing a synthetic neural model of the biological anatomy of selected areas of a human brain, in which the synthetic neural model models (i) groups of neural elements of selected neuronal areas of the brain and (ii) a synthetic connection scheme amongst the neural elements, each of the neural elements having a plurality of pre-synaptic input connections and a post-synaptic output connection, the special purpose processor comprising:

(a) a plurality of neural processing units, each one being associated with a plurality of the neural elements, each of said neural processing units having

(i) first local memory for storing information corresponding respectively to each of the plurality of neural elements associated with said one neural processing unit, said information including input value data for each synaptic input connection of said each of the plurality of neural elements and respective weight value data associated with each said synaptic input connection of said each of said plurality of elements; and

(ii) a programmed processor for (a) processing and performing pre-synaptic calculations on the input value data and the weight value data of each said neural element to produce respective output data for each said neural element, (b) for performing post-synaptic calculations on each said respective output data to produce a respective post-synaptic output data for each said neural element, and (c) for performing, in response to said respective post-synaptic output data, plasticity calculations for updating the weight value data;

(b) second memory external of said plurality of neural processing units for receiving and storing each said post-synaptic output data and said updated weight value data, said second memory having

(i) an output storage table for storing each said post-synaptic output data for each said neural element of each said neural processing unit, and

(ii) random access memory (RAM) for storing said updated weight value data; and

(c) a common distribution data bus for

(i) receiving each said post-synaptic output data and said updated weight value data from each of said neural processing units and for storing each said post-synaptic output data and said updated weight value data in said second external memory, and

(ii) receiving and distributing each said post-synaptic output data and said updated weight value data stored in said second external memory to said first local memory of said plurality of neural processing units in accordance with said connection scheme.

2. A special purpose processor according to claim 1, further comprising a hardware link for coupling said output storage table to at least one other output storage table for storing other post-synaptic output data received from another plurality of neural processing units.

3. A special purpose processor for implementing a synthetic neural model of the biological anatomy of selected areas of a human brain, in which the synthetic neural model models (i) groups of neural elements of selected neuronal areas of the brain and (ii) a synthetic connection scheme amongst the neural elements, each of the neural elements having a plurality of pre-synaptic input connections and a post-synaptic output connection, the special purpose processor comprising:

(a) a plurality of neural processing units, each one being associated with a plurality of the neural elements, each of said neural processing units having

(i) first local memory for storing information corresponding respectively to each of the plurality of neural elements associated with said one neural processing unit, said information including input value data for each synaptic input connection of said each of the plurality of neural elements and respective weight value data associated with each said synaptic input connection of said each of said plurality of elements; and

(ii) a programmed processor for (a) processing and performing pre-synaptic calculations on the input value data and the weight value data of each said neural element to produce respective output data for each said neural element, (b) for performing post-synaptic calculations on each said respective output data to produce a respective post-synaptic output data for each said neural element, and (c) for performing, in response to said respective post-synaptic output data, plasticity calculations for updating the weight value data;

(b) second memory external of said plurality of neural processing units for receiving and storing each said post-synaptic output data and said updated weight value data;

(c) a common distribution data bus for

(i) receiving each said post-synaptic output data and said updated weight value data from each of said neural processing units and for storing each said post-synaptic output data and said updated weight value data in said second external memory, and

(ii) receiving and distributing each said post-synaptic output data and said updated weight value data stored in said second external memory to said first local memory of said plurality of neural processing units in accordance with said connection scheme; and

(d) means for preloading into said first local memory configuration data corresponding to the interconnection of said neural elements amongst said plurality of neural processing units.

4. A special purpose processor for implementing a synthetic neural model of the biological anatomy of selected areas of a human brain, in which the synthetic neural model models groups of neural elements of selected neuronal areas of the brain, each of the neural elements receiving a plurality of respective pre-synaptic inputs and providing a post-synaptic output, said special purpose processor comprising:

(a) a plurality of neural processing units, each one being associated with a plurality of the neural elements, each of said neural processing units having;

(i) a first local memory for storing information corresponding respectively to each of the plurality of neural elements associated with said one neural processing unit, said information including data identifying different parameters of said one neural element, including (a) a static element description of a number of inputs to said neural element, (b) a static synaptic description of a plasticity mode of a synapse associated with said neural element, (c) dynamic synaptic weight variables of pre-synaptic input connections associated with said neural element, (d) dynamic input values for respective pre-synaptic inputs of said neural element, and (e) data identifying the synaptic interconnections of the plurality of neural elements of the plurality of neural processing units; and

(ii) a programmed processor for processing and performing calculations on the dynamic synaptic weight variables and the dynamic input values, wherein said programmed processor, in response to receiving respective said dynamic synaptic weight variables and respective said dynamic input values for respective pre-synaptic inputs of one of said neural elements, calculates an updated post-synaptic output activity datum for said one neural element; and

wherein

(iii) said neural processing unit is programmed to calculate updated dynamic synaptic weight variables and updated post-synaptic output activity data with respect to each one of said neural elements;

(b) an output storage table for storing post-synaptic output activity data of each of said plurality of neural elements;

(c) a data loader for loading the information into said first local memory for each said one neural element and for loading said post-synaptic output activity data of each said neural element into said output storage table, said data loader also functioning to load said updated variable weight data into said first local memory;

(d) a second memory for storing said dynamic synaptic weight variables for each of said neural elements;

(e) an address controller for providing addresses to each of said neural processing units to store the information and transfer said post-synaptic activity output data from said output storage table and said dynamic synaptic weight variables from said second memory into said first local memory; and

(f) a system bus for transferring the dynamic synaptic weight variables and the dynamic input values between said first local memory and said output storage table and said second memory.

5. A special purpose processor according to claim 4, wherein said neural processing unit is programmed to access said first local memory to perform sum of product calculations on the dynamic synaptic weight variables and the dynamic input values for each respective said neural element.

6. A special purpose processor for implementing a synthetic neural model of the biological anatomy of selected areas of a human brain, in which the synthetic neural model models groups of neural elements of selected neuronal areas of the brain, each of the neural elements receiving a plurality of respective pre-synaptic inputs and providing a post-synaptic output, said special purpose processor comprising:

(a) a plurality of neural processing units, each one being associated with a plurality of the neural elements, each of said neural processing units having;

(i) a first local memory for storing information corresponding respectively to each of the plurality of neural elements associated with said one neural processing unit, said information including data identifying different parameters of said one neural element, including (a) a static element description of a number of inputs to said neural element, (b) a static synaptic description of a plasticity mode of a synapse associated with said neural element, (c) dynamic synaptic weight variables of pre-synaptic input connections associated with said neural element, (d) dynamic input values for respective pre-synaptic inputs of said neural element, and (e) data identifying the synaptic interconnections of the plurality of neural elements of the plurality of neural processing units; and

(ii) a programmed processor for processing and performing calculations on the dynamic synaptic weight variables and the dynamic input values, wherein said programmed processor, in response to receiving respective said dynamic synaptic weight variables and respective said dynamic input values for respective pre-synaptic inputs of one of said neural elements, calculates an updated post-synaptic output activity datum for said one neural element;

(b) an output storage table for storing post-synaptic output activity data of each of said plurality of neural elements;

(c) a data loader for loading the information into said first local memory for each said one neural element and for loading said post-synaptic output activity data of each said neural element into said output storage table;

(d) a second memory for storing said dynamic synaptic weight variables for each of said neural elements;

(e) an address controller for providing addresses to each of said neural processing units to store the information and transfer said post-synaptic activity output data from said output storage table and said dynamic synaptic weight variables from said second memory into said first local memory;

(f) a system bus for transferring the dynamic synaptic weight variables and the dynamic input values between said first local memory and said output storage table and said second memory; and

(g) a system data bus for transferring data between said plurality of neural processing units and said second memory and said output storage table for each said neural element of each said neural processing unit.

7. A special purpose processor for implementing a synthetic neural model of the biological anatomy of selected areas of a human brain, in which the synthetic neural model models groups of neural elements of selected neuronal areas of the brain, each of the neural elements receiving a plurality of respective pre-synaptic inputs and providing a post-synaptic output, said special purpose processor comprising:

(a) a plurality of neural processing units, each one being associated with a plurality of the neural elements, each of said neural processing units having;

(i) a first local memory for storing information corresponding respectively to each of the plurality of neural elements associated with said one neural processing unit, said information including data identifying different parameters of said one neural element, including (a) a static element description of a number of inputs to said neural element, (b) a static synaptic description of a plasticity mode of a synapse associated with said neural element, (c) dynamic synaptic weight variables of pre-synaptic input connections associated with said neural element, (d) dynamic input values for respective pre-synaptic inputs of said neural element, and (e) data identifying the synaptic interconnections of the plurality of neural elements of the plurality of neural processing units; and

(ii) a programmed processor for processing and performing calculations on the dynamic synaptic weight variables and the dynamic input values, wherein said programmed processor, in response to receiving respective said dynamic synaptic weight variables and respective said dynamic input values for respective pre-synaptic inputs of one of said neural elements, calculates an updated post-synaptic output activity datum for said one neural element;

(b) an output storage table for storing post-synaptic output activity data of each of said plurality of neural elements;

(c) a data loader for loading the information into said first local memory for each said one neural element and for loading said post-synaptic output activity data of each said neural element into said output storage table;

(d) a second memory for storing said dynamic synaptic weight variables for each of said neural elements;

(e) an address controller for providing addresses to each of said neural processing units to store the information and transfer said post-synaptic activity output data from said output storage table and said dynamic synaptic weight variables from said second memory into said first local memory;

(f) a system bus for transferring the dynamic synaptic weight variables and the dynamic input values between said first local memory and said output storage table and said second memory; and

(g) wherein (i) said data loader accesses and sends the dynamic synaptic weight variables from said second memory to said system bus, (ii) said data loader accesses and sends pointers from said second memory to said output storage table which, in response, outputs said post-synaptic activity output data to said system bus, and (iii) wherein, in response, said system data bus sends said dynamic weight variables and said post-synaptic output activity data to a respective said neural processing unit.

8. A special purpose processor according to claim 7, wherein:

(a) said system data bus sends an address to access said one neural processing unit;

(b) said system data bus, in response to said one neural processing unit receiving said address, receives said dynamic weight variables and said post-synaptic output activity data; and

(c) said system data bus transfers said dynamic weight variables from said system data bus to said second memory and said post-synaptic activity output data to said output storage table.