MANUFACTURING METHOD FOR METAL GATE

• US 20120329261A1
• Filed: 06/21/2011
• Published: 12/27/2012
• Est. Priority Date: 06/21/2011
• Status: Active Grant

• Current Assignee: United Microelectronics Corporation
• Original Assignee: United Microelectronics Corporation
• Inventors: Wang, Shao-Wei, Wang, Yu-Ren, Lin, Chien-Liang, Teng, Wen-Yi, Lu, Tsuo-Wen, Chen, Chih-Chung, Yen, Ying-Wei, Lin, Yu-Min, Chien, Chin-Cheng, Chen, Jei-Ming, Hsu, Chun-Wei, Chan, Shu-Yen, Chang, Chia-Lung, Wu, Yi-Ching
• Granted Patent: US 8,536,038 B2
• Time in Patent Office: Days
• US Class Current: 438/589
• CPC Class Codes: H01L 21/265 producing ion implantation
• CPC Class Codes: H01L 21/3215 Doping the layers
• CPC Class Codes: H01L 21/823842 gate conductors with different gate conductor materials or different gate conductor implants, e.g. dual gate structures
• CPC Class Codes: H01L 29/4966 the conductor material next to the insulator being a composite material, e.g. organic material, TiN, MoSi2 H01L29/4908, H01L29/4983 take precedence
• CPC Class Codes: H01L 29/517 the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate H01L29/518 takes precedence
• CPC Class Codes: H01L 29/665 using self aligned silicidation, i.e. salicide formation of conductive layers comprising silicides H01L21/28518
• CPC Class Codes: H01L 29/66545 using a dummy, i.e. replacement gate in a process wherein at least a part of the final gate is self aligned to the dummy gate
• CPC Class Codes: H01L 29/6659 with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET
• CPC Class Codes: H01L 29/7833 with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's for thin film transistors H01L29/78618

Abstract

A manufacturing method for a metal gate includes providing a substrate having at least a semiconductor device with a conductivity type formed thereon, forming a gate trench in the semiconductor device, forming a work function metal layer having the conductivity type and an intrinsic work function corresponding to the conductivity type in the gate trench, and performing an ion implantation to adjust the intrinsic work function of the work function metal layer to a target work function.

Claims

1. A manufacturing method for a metal gate comprising:

providing a substrate having at least a semiconductor device with a conductivity type formed thereon;

forming a gate trench in the semiconductor device;

forming a work function metal layer having the conductivity type and an intrinsic work function corresponding to the conductivity type in the gate trench; and

performing an ion implantation to adjust the intrinsic work function of the work function metal layer to a target work function.

2. The manufacturing method for a metal gate according to claim 1, wherein the semiconductor device further comprises at least a high-k gate dielectric layer, a bottom barrier layer, and an etch stop layer, and the etch stop layer is exposed in a bottom of the gate trench.

3. The manufacturing method for a metal gate according to claim 1, wherein the conductivity type of the semiconductor device is a p-type.

4. The manufacturing method for a metal gate according to claim 3, wherein the work function metal layer comprises titanium nitride (TiN), titanium carbide (TiC), tantalum nitride (TaN), tantalum carbide (TaC), tungsten carbide (WC), or aluminum titanium nitride (TiAlN).

5. The manufacturing method for a metal gate according to claim 3, wherein the ion implantation comprises implanting aluminum (Al), nitrogen (N), chlorine (Cl), oxygen (O), fluorine (F), or bromine (Br).

6. The manufacturing method for a metal gate according to claim 3, wherein the target work function is between 4.9 eV and 5.2 eV.

7. The manufacturing method for a metal gate according to claim 3, further comprising performing a thermal treatment after the ion implantation.

8. The manufacturing method for a metal gate according to claim 7, wherein the thermal treatment comprises introducing oxygen.

9. The manufacturing method for a metal gate according to claim 7, wherein the ion implantation is performed before forming the work function metal layer and the thermal treatment is performed after forming the work function metal layer.

10. The manufacturing method for a metal gate according to claim 7, wherein the ion implantation is performed after forming the work function metal layer.

11. The manufacturing method for a metal gate according to claim 1, wherein the conductivity type of the semiconductor device is an n-type.

12. The manufacturing method for a metal gate according to claim 11, wherein the work function metal layer comprises titanium aluminide (TiAl), zirconium aluminide (ZrAl), tungsten aluminide (WAl), tantalum aluminide (TaAl), or hafnium aluminide (HfAl).

13. The manufacturing method for a metal gate according to claim 12, further comprising:

forming the work function metal layer on the substrate and in the gate trench; and

performing an Al ion implantation to adjust a Al concentration of the work function metal layer.

14. The manufacturing method for a metal gate according to claim 12, further comprising:

forming a metal layer on the substrate and in the gate trench; and

performing an Al ion implantation to form the work function metal layer.

15. The manufacturing method for a metal gate according to claim 11, wherein the ion implantation comprises implanting lanthanum (La), zirconium (Zr), hafnium (Hf), titanium (Ti), aluminum (Al), niobium (Nb), or tungsten (W).

16. The manufacturing method for a metal gate according to claim 11, wherein the target work function is between 3.9 eV and 4.2 eV.

17. The manufacturing method for a metal gate according to claim 11, further comprising performing a nitrogen thermal treatment after the ion implantation.

18. The manufacturing method for a metal gate according to claim 17, wherein the ion implantation is performed before forming the work function metal layer and the nitrogen thermal treatment is performed after forming the work function metal layer.

19. The manufacturing method for a metal gate according to claim 17, wherein the ion implantation is performed after forming the work function metal layer.

20. The manufacturing method for a metal gate according to claim 1, further comprising forming a filling metal layer in the gate trench, the filling metal layer fills up the gate trench.

21. A manufacturing method for metal gates comprising:

providing a substrate having at least a first semiconductor device and a second semiconductor device formed thereon, the first semiconductor device having a first conductivity type, the second semiconductor device having a second conductivity type, and the first conductivity type and the second conductivity type being complementary;

forming a first gate trench and a second gate trench respectively in the first semiconductor device and the second semiconductor device;

forming a first work function metal layer in the first gate trench, the first work function metal layer having the first conductivity type and a first intrinsic work function corresponding to the first conductivity type;

performing a first ion implantation to adjust the first intrinsic work function to a first target work function;

removing a portion of the first work function metal layer to expose a bottom of the second gate trench;

forming a second work function metal layer in the second gate trench, the second work function metal layer having the second conductivity type and a second intrinsic work function corresponding to the second conductivity type; and

performing a second ion implantation to adjust the second intrinsic work function to a second target work function.

22. The manufacturing method for metal gates according to claim 21, wherein the first conductivity type of the first semiconductor device is a p-type.

23. The manufacturing method for metal gates according to claim 22, wherein the first work function metal layer includes TiN, TiC, TaN, TaC, WC, or TiAlN.

24. The manufacturing method for metal gates according to claim 22, wherein the first ion implantation comprises implanting Al, N, Cl, O, F, or Br.

25. The manufacturing method for metal gates according to claim 22, wherein the first target work function is between 4.9 eV and 5.2 eV.

26. The manufacturing method for metal gates according to claim 22, further comprising performing a thermal treatment after the first ion implantation.

27. The manufacturing method for metal gates according to claim 26, wherein the thermal treatment further comprises introducing oxygen.

28. The manufacturing method for metal gates according to claim 26, wherein the first ion implantation is performed before forming the first work function metal layer or after forming the first work function metal layer.

29. The manufacturing method for metal gates according to claim 21, wherein the second conductivity type of the second semiconductor device is an n-type.

30. The manufacturing method for metal gates according to claim 29, wherein the second work function metal layer comprises TiAl, ZrAl, WAl, TaAl, or HfAl.

31. The manufacturing method for metal gates according to claim 30, further comprising:

forming the second work function metal layer on the substrate and in the second gate trench; and

performing a Al ion implantation to adjust a Al concentration of the second work function metal layer.

32. The manufacturing method for metal gates according to claim 30, further comprising:

forming a metal layer on the substrate and in the second gate trench; and

performing a Al ion implantation to form the second work function metal layer.

33. The manufacturing method for metal gates according to claim 29, wherein the second ion implantation comprises implanting Al, Zr, Hf, Ti, Al, Nb, or W.

34. The manufacturing method for metal gates according to claim 29, wherein the second target work function is between 3.9 eV and 4.2 eV.

35. The manufacturing method for metal gates according to claim 21, further comprising performing a nitrogen thermal treatment after the second ion implantation.

36. The manufacturing method for metal gates according to claim 21, wherein the second ion implantation is performed before forming the second work function metal layer or after forming the second work function metal layer.