ORGANIC LIGHT-EMITTING DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME

• US 20130001564A1
• Filed: 12/01/2011
• Published: 01/03/2013
• Est. Priority Date: 06/28/2011
• Status: Active Grant

• Current Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Original Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Inventors: Choi, Jong-Hyun, Oh, Jae-Hwan
• Granted Patent: US 9,000,523 B2
• Time in Patent Office: Days
• US Class Current: 257/59
• CPC Class Codes: H01L 29/41733 for thin film transistors with insulated gate
• CPC Class Codes: H01L 29/66765 Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate
• CPC Class Codes: H01L 2924/13069 Thin film transistor [TFT]
• CPC Class Codes: H01L 2924/1307 Organic Field-Effect Transistor [OFET]
• CPC Class Codes: H10K 10/46 Field-effect transistors, e.g. organic thin-film transistors [OTFT] H10K10/43 takes precedence
• CPC Class Codes: H10K 10/462 Insulated gate field-effect transistors [IGFETs]
• CPC Class Codes: H10K 10/464 Lateral top-gate IGFETs comprising only a single gate
• CPC Class Codes: H10K 59/10 OLED displays
• CPC Class Codes: H10K 59/1201 Manufacture or treatment
• CPC Class Codes: H10K 59/1213 the pixel elements being TFTs
• CPC Class Codes: H10K 59/123 Connection of the pixel electrodes to the thin film transistors [TFT]
• CPC Class Codes: H10K 59/125 including organic TFTs [OTFT]
• CPC Class Codes: H10K 59/131 Interconnections, e.g. wiring lines or terminals
• CPC Class Codes: H10K 71/00 Manufacture or treatment specially adapted for the organic devices covered by this subclass
• CPC Class Codes: H10K 71/40 Thermal treatment, e.g. annealing in the presence of a solvent vapour

Abstract

An organic light-emitting display device including a TFT comprising an active layer, a gate electrode comprising a lower gate electrode and an upper gate electrode, and source and drain electrodes insulated from the gate electrode and contacting the active layer; an organic light-emitting device electrically connected to the TFT and comprising a pixel electrode formed in the same layer as where the lower gate electrode is formed; and a pad electrode electrically coupled to the TFT or the organic light emitting device and comprising a first pad electrode formed in the same layer as in which the lower gate electrode is formed, a second pad electrode formed in the same layer as in which the upper gate electrode is formed, and a third pad electrode comprising a transparent conductive oxide, the first, second, and third pad electrodes being sequentially stacked.

Claims

1. An organic light-emitting display device comprising:

a thin film transistor (TFT) comprising an active layer, a gate electrode insulated from the active layer, the gate electrode comprising a lower gate electrode and an upper gate electrode, the TFT further comprising a source electrode and a drain electrode both insulated from the gate electrode and contacting the active layer;

an organic light-emitting device electrically connected to the TFT and comprising a pixel electrode formed in the same layer as the layer where the lower gate electrode is formed, an intermediate layer comprising an emission layer, and an opposite electrode, wherein the pixel electrode, the intermediate layer, and the opposite electrode are sequentially stacked; and

a pad electrode electrically coupled to the TFT or the organic light emitting device and comprising a first pad electrode formed in the same layer as the layer in which the lower gate electrode is formed, a second pad electrode formed in the same layer as the layer in which the upper gate electrode is formed, and a third pad electrode comprising a transparent conductive oxide, wherein the first, second, and third pad electrodes are sequentially stacked.

2. The organic light-emitting display device of claim 1, further comprising at least one insulation layer covering the gate electrode and the pad electrode, wherein the insulation layer has a hole that does not expose an edge of the pad electrode and exposes at least a center portion of the pad electrode.

3. The organic light-emitting display device of claim 2, wherein a portion of the pad electrode exposed via the hole is electrically connected to a driver integrated circuit (IC) for supplying a current, in order to drive the organic light-emitting display device.

4. The organic light-emitting display device of claim 2, wherein the source electrode and the drain electrode are arranged on an upper surface of the at least one insulation layer.

5. The organic light-emitting display device of claim 1, wherein the third pad electrode comprises polycrystal indium tin oxide (p-ITO).

6. The organic light-emitting display device of claim 1, wherein the lower gate electrode, the pixel electrode, and the first pad electrode comprise a transparent conductive oxide.

7. The organic light-emitting display device of claim 1, wherein the upper gate electrode and the second pad electrode comprise at least one selected from among silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W), MoW, and copper (Cu).

8. The organic light-emitting display device of claim 1, further comprising a capacitor comprising a lower capacitor electrode formed in the same layer as the layer in which the active layer is formed and an upper capacitor electrode formed in the same layer as the layer in which the gate electrode is formed, the capacitor electrically coupled to the TFT.

9. A method of manufacturing an organic light-emitting display device, the method comprising:

a first mask process of forming an active layer of a thin film transistor (TFT) on a substrate;

a second mask process of sequentially stacking a first insulation layer, a first conductive layer, a second conductive layer, and a third conductive layer on an upper surface of the active layer and then patterning the first conductive layer, the second conductive layer, and the third conductive layer to form;

a gate electrode comprising the first conductive layer that serves as a lower gate electrode and the second conductive layer that serves as an upper gate electrode,

a first electrode pattern comprising the first and second conductive layers, and

a pad electrode comprising the first conductive layer that serves as a first pad electrode, the second conductive layer that serves as a second pad electrode, and the third conductive layer that serves as a third pad electrode;

a third mask process of forming a second insulation layer on upper surfaces of the gate electrode, the first electrode pattern, and the pad electrode and then forming holes exposing a part of the active layer via patterning of the first and second insulation layers and holes exposing at least a part of the first electrode pattern and the pad electrode via patterning of the second insulation layer;

a fourth mask process of forming a source electrode and a drain electrode that contact the active layer via the holes and forming a pixel electrode from the first electrode pattern; and

a fifth mask process of forming a pixel definition layer exposing at least a part of the pixel electrode.

10. The method of claim 9, wherein the second mask process comprises:

sequentially stacking the first insulation layer, the first conductive layer, the second conductive layer, and the third conductive layer on the upper surface of the active layer;

forming a first photosensitive layer pattern having a first thickness in a first region corresponding to the gate electrode and the first electrode pattern, and having a second thickness greater than the first thickness in a second region corresponding to the pad electrode, by using a halftone mask;

forming the gate electrode, the first electrode pattern, and the pad electrode inside where each of the first, second, and third conductive layers are sequentially stacked, by using the first photosensitive layer pattern as a mask;

forming a second photosensitive layer pattern having a third thickness in the second region, by removing the first photosensitive layer pattern by as much as the first thickness; and

removing the third conductive layer positioned in an upper portion of the first region by using the second photosensitive layer pattern as a mask to form;

the gate electrode comprising the first conductive layer that serves as the lower gate electrode and the second conductive layer that serves as the upper gate electrode,

the first electrode pattern comprising the first and second conductive layers, and

the pad electrode comprising the first conductive layer that serves as the first pad electrode, the second conductive layer that serves as the second pad electrode, and the third conductive layer that serves as the third pad electrode.

11. The method of claim 9, after the second mask process, further comprising generating polycrystal indium tin oxide (p-ITO) by annealing the third pad electrode.

12. The method of claim 9, after the second mask process, further comprising forming a source area and a drain area by doping the active layer with impurities.

13. The method of claim 9, wherein, in the third mask process, the hole is formed in the second insulation layer so that an edge of the pad electrode is not exposed and at least a center portion of the pad electrode is exposed.

14. The method of claim 13, wherein a portion of the pad electrode exposed via the hole is electrically connected to a driver IC which supplies a current, in order to drive the organic light-emitting display device.

15. The method of claim 9, wherein the fourth mask process comprises:

forming a fourth conductive layer on the second insulation layer;

forming the source electrode and the drain electrode by patterning the fourth conductive layer; and

forming the pixel electrode comprising the first conductive layer, by removing the second conductive layer constituting the first electrode pattern.

16. The method of claim 9, wherein

the first mask process further comprises forming a lower capacitor electrode in the same layer as the layer in which the active layer is formed, and

the second mask process further comprises forming an upper capacitor electrode on an upper surface of the lower capacitor electrode.

17. The method of claim 9, after the fifth mask process, further comprising forming an intermediate layer comprising an emission layer, and an opposite electrode on an upper surface of the pixel electrode.