SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

• US 20130009240A1
• Filed: 09/14/2012
• Published: 01/10/2013
• Est. Priority Date: 08/04/2004
• Status: Abandoned Application

• Current Assignee: ROHM Co., Ltd.
• Original Assignee: ROHM Co., Ltd.
• Inventors: TAKAISHI, Masaru
• Application Number:
  US13/617,285
• Publication Number:
  US 20130009240A1
• Time in Patent Office: Days
• US Class Current: 257/330
• CPC Class Codes: H01L 21/26586 characterised by the angle between the ion beam and the crystal planes or the main crystal surface
• CPC Class Codes: H01L 21/28035 the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities H01L21/28105 takes precedence
• CPC Class Codes: H01L 21/28211 in a gaseous ambient using an oxygen or a water vapour, e.g. RTO, possibly through a layer H01L21/28194 and H01L21/28202 take precedence
• CPC Class Codes: H01L 29/0634 Multiple reduced surface field (multi-RESURF) structures, e.g. double RESURF, charge compensation, cool, superjunction (SJ), 3D-RESURF, composite buffer (CB) structures
• CPC Class Codes: H01L 29/42368 the thickness being non-uniform
• CPC Class Codes: H01L 29/66734 with a step of recessing the gate electrode, e.g. to form a trench gate electrode
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236

Abstract

A semiconductor device including a drain region of a first conductivity type formed on a semiconductor substrate; an element forming region that is provided on the drain region and that has a concave portion reaching the drain region; a gate electrode disposed in the concave portion; a superjunction structure portion that is disposed in the element forming region and that is formed by alternately arranging a drift layer of the first conductivity type penetrated by the concave portion and a resurf layer of a second conductivity type being in contact with the drift layer on the semiconductor substrate; and a base region of the second conductivity type that is disposed on the superjunction structure portion so as to be in contact with the drift layer in the element forming region, that is penetrated by the concave portion, and that faces the gate electrode with the gate insulating film therebetween.

Claims

1-5. -5. (canceled)

6. A semiconductor device comprising:

a drain region of a first conductivity type comprised of a semiconductor substrate;

an element forming region provided on the drain region, the element forming region having a concave portion reaching the drain region;

a gate electrode disposed in the concave portion;

a gate insulting film provided between the gate electrode and an inner wall surface of the concave portion;

a drift layer of the first conductivity type disposed in the element forming region, the drift layer being penetrated by the concave portion;

a base region of the second conductivity type disposed on the drift layer so as to be in contact with the drift layer in the element forming region, the base region being penetrated by the concave portion and facing the gate electrode with the gate insulating film interposed therebetween;

a source region formed on the base region in the element forming region, the source region being penetrated by the concave portion;

a filler disposed inside the concave portion closer to a bottom thereof than the gate electrode, the filler being electrically conductive; and

an inter-conductor insulating film disposed between the gate electrode and the filler.

7. A semiconductor device according to claim 6, further comprising a filler insulating film having a thickness different from a thickness of the gate insulating film, the filler insulating film being formed by being stuck onto an area of the inner wall surface of the concave portion deeper than a part where the base region faces the gate electrode in the inner wall surface of the concave portion, the filler insulating film being provided outside the filler.

8. A semiconductor device according to claim 7, wherein the gate insulating film along a side surface of the gate electrode is thinner than the filler insulating film along a side surface of the filler.

9. A semiconductor device according to claim 6, wherein a width of the filler is narrower than a width of the gate electrode.

10. A semiconductor device according to claim 6, wherein the base region does not face the filler.

11. A semiconductor device according to claim 6, wherein the drift layer faces the filler.

12. A semiconductor device according to claim 6, wherein

an upper part of the concave portion in which the gate electrode is disposed is greater in width than a lower part of the concave portion in which the filler is disposed, and

the concave portion has a portion whose width becomes gradually greater from the lower part to the upper part to connect the lower part and the upper part.

13. A semiconductor device according to claim 6, a length of the filler in a depth direction of the concave portion is greater than a length of the gate electrode in the depth direction of the concave portion.

14. A semiconductor device according to claim 6, further comprising an electrode insulating film disposed on the element forming region;

and a source electrode disposed on the element forming region, the source electrode entering into an opening formed in the electrode insulating film to be electrically connected to the source region exposed in the opening.

15. A semiconductor device according to claim 6, wherein

a plurality of the concave portions are formed in the element forming region, and

the semiconductor device further comprises a resurf layer of the second conductivity type disposed between an adjacent pair of the concave portions, the resurf layer being disposed between one drift layer through which one of the adjacent pair of the concave portions penetrates and another drift layer through which the other of the adjacent pair of the concave portions penetrates.

16. A semiconductor device according to claim 15, wherein the drift layer and the resurf layer are alternately arranged on the semiconductor substrate to form a super junction structure portion.

17. A semiconductor device according to claim 15, wherein an impurity concentration of the resurf layer is lower than an impurity concentration of the base layer.

18. A semiconductor device according to claim 15, wherein an impurity concentration of the drift layer is lower than an impurity concentration of the drain layer.

19. A semiconductor device according to claim 6, wherein an IGBT is formed on the semiconductor substrate.

20. A method of manufacturing a semiconductor device having a drift layer of a first conductivity type on a drain region of the first conductivity type formed on a semiconductor substrate, the method comprising the steps of:

forming a semiconductor layer of a second conductivity type different from the first conductivity type on the drain region;

forming a concave portion that penetrates through the semiconductor layer and reaches the drain region;

forming the drift layer along an inner wall surface of the concave portion by introducing impurities of the first conductivity type onto the semiconductor layer exposed to the inner wall surface of the concave portion;

forming a base region of the second conductivity type having an exposed part exposed to the inner wall surface of the concave portion on a surface part of the semiconductor layer by introducing impurities of the second conductivity type from a surface of the semiconductor layer;

forming a source region of the first conductivity type exposed to the inner wall surface of the concave portion by introducing impurities of the first conductivity type onto a surface part of the base region at an edge of the concave portion;

forming an insulating film on the inner wall surface of the concave portion;

filling an electrically conductive filler into a bottom part of the concave portion under a predetermined depth which is deeper than the exposed part of the base region in the concave portion after the insulating film is formed;

removing the insulating film while allowing the filler to serves as a mask;

forming a gate insulating film thinner than the insulating film in an area corresponding to the exposed part of the base region on an exposed surface of the inner wall surface of the concave portion exposed by the removing step, and simultaneously forming an inter-conductor insulating film on an exposed surface of the filler; and

forming a gate electrode that is to face the exposed part of the base region and the filler, inside the concave portion, with the gate insulating film and the inter-conductor insulating film respectively interposed therebetween.

21. A method of claim 20, wherein the step of filling the filler includes the steps of:

supplying the filler to shallower position than the predetermined depth within the concave portion; and

subjecting the filler to etchback up to the predetermined depth, subsequent to the step of supplying the filler.

22. The method of claim 20, wherein the step of forming the base region includes a step of implanting impurity ions of the second conductivity type into the inner wall surface of the concave portion.