CENTRAL PROCESSOR WITH MULTIPLE PROGRAMMABLE PROCESSOR UNITS
First Claim
Patent Images
1. A central processor for an imaging device with a CMOS image sensor, the central processor comprising:
- an image sensor interface for receiving data from the CMOS image sensor;
multiple processing units configured to operate in parallel for processing data from the image sensor interface, each of the processing units having rewritable memory for microcode to operatively control that processing unit;
wherein,the multiple processing units and the image sensor interface are integrated onto a single chip.
4 Assignments
0 Petitions
Accused Products
Abstract
A central processor for installation in an imaging device with a CMOS image sensor. The central processor had an image sensor interface for receiving data from the CMOS image sensor and multiple processing units configured to operate in parallel for processing data from the image sensor interface. Each of the processing units has rewritable memory for microcode that operatively controls that processing unit. The multiple processing units and the image sensor interface are integrated onto a single chip.
95 Citations
14 Claims
-
1. A central processor for an imaging device with a CMOS image sensor, the central processor comprising:
-
an image sensor interface for receiving data from the CMOS image sensor; multiple processing units configured to operate in parallel for processing data from the image sensor interface, each of the processing units having rewritable memory for microcode to operatively control that processing unit;
wherein,the multiple processing units and the image sensor interface are integrated onto a single chip. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14)
-
Specification