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METHODS OF MANUFACTURING THREE-DIMENSIONAL SEMICONDUCTOR DEVICES

  • US 20130017629A1
  • Filed: 07/10/2012
  • Published: 01/17/2013
  • Est. Priority Date: 07/11/2011
  • Status: Active Grant
First Claim
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1. A method of manufacturing a three-dimensional semiconductor device, comprising:

  • forming a peripheral structure on a peripheral circuits region of a substrate,the peripheral structure including peripheral circuits;

    recessing a cell array region of the substrate to form a concave region in the substrate,the concave region having a bottom surface lower than a top surface of the peripheral structure;

    forming a stacked layer structure conformally covering the substrate in which the concave region is formed,the stacked layer structure including a plurality of layers sequentially stacked, andthe stacked layer structure having a lower top surface in the cell array region of the substrate compared to a top surface of the stacked layer structure in the peripheral circuits region of the substrate;

    forming a planarization stop layer that conformally covers the stacked layer structure; and

    planarizing the stacked layer structure using the planarization stop layer in the cell array region as a planarization end point to expose top surfaces of the layers between the cell array region and the peripheral circuits region simultaneously with a top surface of the peripheral structure.

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