Package and Manufacturing Method of the Same

• US 20130020109A1
• Filed: 12/23/2010
• Published: 01/24/2013
• Est. Priority Date: 01/19/2010
• Status: Active Grant

• Current Assignee: Suzhou Lekin Semiconductor Company Limited
• Original Assignee: LG Innotek Company Limited (LG Corporation)
• Inventors: Han, Young Ju, Hwang, Deok Ki, Lim, Jae Chung
• Granted Patent: US 9,219,206 B2
• Time in Patent Office: Days
• US Class Current: 174/251
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 2933/0066 relating to arrangements for conducting electric current to or from the semiconductor body
• CPC Class Codes: H01L 33/0093 Wafer bonding; Removal of the growth substrate
• CPC Class Codes: H01L 33/44 characterised by the coatings, e.g. passivation layer or anti-reflective coating
• CPC Class Codes: H01L 33/486 adapted for surface mounting
• CPC Class Codes: H01L 33/62 Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls

Abstract

Provided are a package including a first conductive layer on a patterned layer, an insulating layer on the patterned layer burying the first conductive layer, a second conductive layer on an outer surface of the insulating layer, and a third conductive layer in the insulating layer electrically connecting the first conductive layer with the second conductive layer. A substrate is formed by printing or coating a paste- or ink-type insulator and conductor on a patterned layer formed on a sapphire wafer. No void is created between the substrate and LED chip, thus enhancing attachment strength. The ceramic-containing insulator is cured at a low temperature, thereby minimizing contraction of and damage to the wafer when the ceramic is fired. Printing methods utilizing viscous paste or ink solves problems with co-planarity of substrate that occur in existing wafer-to-wafer bonding processes and renders several steps of the existing substrate manufacturing process unnecessary.

Claims

1. A package comprising:

a first conductive layer on a patterned layer;

an insulating layer on the patterned layer to bury the first conductive layer;

a second conductive layer on an outer surface of the insulating layer; and

a third conductive layer in the insulating layer to electrically connect the first conductive layer with the second conductive layer.

2. The package of claim 1, wherein the insulating layer includes a filler that contains at least one of Si, Al, AlN, BN, Al₂O₃, and LTCC (“

Low Temperature Cofiered Ceramics”

).

3. The package of claim 1, wherein the insulating layer includes a filler, a resin, a dispersing agent, and an additive.

4. The package of claim 3, wherein the filler includes a phosphor.

5. The package of claim 3, wherein the filler or resin is metal powder selected from Ag, W, Pt, and Pd, and epoxy resin, or ceramic powder using ion conductivity and selected from BaAl₂O₄ or ZnS and epoxy resin, or contains at least one of Si, Al, AlN, Al₂O₃, BN and LTCC (“

Low Temperature Cofired Ceramics”

).

13. The package of claim 4, wherein the filler or resin is metal powder selected from Ag, W, Pt, and Pd, and epoxy resin, or ceramic powder using ion conductivity and selected from BaAl₂O₄ or ZnS and epoxy resin, or contains at least one of Si, Al, MN, Al₂O₃, BN and LTCC (“

Low Temperature Cofired Ceramics”

).

6. A method of manufacturing a package comprising:

forming a patterned layer on a sapphire substrate;

forming a first conductive layer on the patterned layer;

forming at least one of an insulating layer and a third conductive layer on the patterned layer and the first conductive layer by a printing method using a paste or an ink to bury the first conductive layer;

forming a second conductive layer on the third conductive layer to be electrically connected to the first conductive layer; and

removing the sapphire substrate.

7. The method of claim 6, wherein burying the first conductive layer is performed by sequentially or alternately printing a paste- or ink-type insulating material and a paste- or ink-type conductive material on the patterned layer and the first conductive layer, and curing the insulating material and the conductive layer to form the insulating layer and the third conductive layer.

8. The method of claim 6, wherein burying the first conductive layer is performed by printing a paste- or ink-type insulating material on the patterned layer and the first conductive layer and curing the insulating material to form the insulating layer, and plating an inner portion of the insulating layer to form the third conductive layer.

9. The method of claim 6, wherein burying the first conductive layer is performed by plating the third conductive layer on the first conductive layer and printing and curing a paste- or ink-type insulating material on the patterned layer and the first conductive layer to form the insulating layer.

10. The method of claim 6, wherein forming the second conductive layer includes printing a paste- or ink-type insulating material to form the second conductive layer.

11. The method of claim 6, wherein removing the sapphire substrate is performed by a laser lift-off process.

12. The method of claim 7, wherein the paste- or ink-type insulating material includes a filler, a resin, a solvent, a dispersing agent, and an additive, wherein the solvent is volatilized after curing.

14. The method of claim 8, wherein the paste- or ink-type insulating material includes a filler, a resin, a solvent, a dispersing agent, and an additive, wherein the solvent is volatilized after curing.

15. The method of claim 9, wherein the paste- or ink-type insulating material includes a filler, a resin, a solvent, a dispersing agent, and an additive, wherein the solvent is volatilized after curing.