U-MOS TRENCH PROFILE OPTIMIZATION AND ETCH DAMAGE REMOVAL USING MICROWAVES

• US 20130023097A1
• Filed: 07/13/2012
• Published: 01/24/2013
• Est. Priority Date: 07/14/2011
• Status: Abandoned Application

• Current Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Original Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Inventors: Purtell, Robert J.
• Application Number:
  US13/549,182
• Publication Number:
  US 20130023097A1
• Time in Patent Office: Days
• US Class Current: 438/270
• CPC Class Codes: H01L 21/30604 Chemical etching
• CPC Class Codes: H01L 21/3065 Plasma etching; Reactive-ion etching
• CPC Class Codes: H01L 29/4236 within a trench, e.g. trench gate electrode, groove gate electrode
• CPC Class Codes: H01L 29/66666 Vertical transistors H01L29/66712, H01L29/66742 take precedence
• CPC Class Codes: H01L 29/7827 Vertical transistors H01L29/7802, H01L29/78642 take precedence

Abstract

Semiconductor devices and methods for making such devices are described. The UMOS (U-shaped MOSFET) semiconductor devices can be formed by providing a semiconductor substrate, forming a trench in the substrate using a wet or dry etching process, and then radiating the trench structure using microwaves (MW) at low temperatures. The MW radiation process improves the profile of the trench and repairs the damage to the trench structure caused by the dry etching process. The microwave radiation can help re-align the Si or SiGe atoms in the semiconductor substrate and anneal out the defects present after the dry etching process. As well, the microwave radiation can getter atoms or ions used in the dry etching process that are left in the lattice of the trench structure. Other embodiments are described.

Claims

1. A method for making a trench in a semiconductor substrate, comprising:

providing a semiconductor substrate;

forming a trench in the substrate using a wet or dry etching process; and

radiating the trench using microwaves at a low temperature.

2. The method of claim 1, wherein the radiation is performed at a temperature less than about 800°

C.

3. The method of claim 1, wherein the radiation is performed at a temperature ranging from about 200 to about 800°

C.

4. The method of claim 1, wherein the radiation is performed at a temperature ranging from about 400°

C. to about 550°

C.

5. The method of claim 1, wherein the radiation is performed for up to about 120 minutes.

6. The method of claim 1, wherein the radiation is performed for about 2 minutes to about 60 minutes.

7. The method of claim 1, wherein the semiconductor substrate comprises Si or SiGe.

8. The method of claim 7, wherein the microwave radiation re-aligns the Si or SiGe atoms in the substrate and anneal out the defects present after the dry etching process.

9. The method of claim 7, wherein the microwave radiation getters atoms or ions used in the dry etching process that are left in the lattice of the trench structure.

10. The method of claim 1, further comprising forming a gate of a MOSFET device in the trench.

11. A method for making a UMOS semiconductor device, comprising:

providing a semiconductor substrate;

forming a trench in the substrate using a wet or dry etching process;

radiating the trench using microwaves at a low temperature;

forming an insulating layer in the trench;

forming a gate on the insulating layer;

forming an insulating cap over the gate; and

forming a source and a drain.

12. The method of claim 11, wherein the radiation is performed at a temperature less than about 800°

C.

13. The method of claim 11, wherein the radiation is performed at a temperature ranging from about 200 to about 800°

C.

14. The method of claim 11, wherein the radiation is performed at a temperature ranging from about 400°

C. to about 550°

C.

15. The method of claim 11, wherein the radiation is performed for up to about 120 minutes.

16. The method of claim 11, wherein the radiation is performed for about 2 minutes to about 60 minutes.

17. The method of claim 11, wherein the semiconductor substrate comprises Si or SiGe.

18. The method of claim 17, wherein the microwave radiation re-aligns the Si or SiGe atoms in the substrate and anneal out the defects present after the dry etching process.

19. The method of claim 17, wherein the microwave radiation getters atoms or ions used in the dry etching process that are left in the lattice of the trench structure.

20. A method for making a trench in a semiconductor substrate, comprising:

providing a semiconductor substrate containing Si or SiGe;

forming a trench in the substrate using a wet or dry etching process; and

radiating the trench using microwaves at a temperature less than about 800°

C.;

wherein the microwave radiation re-aligns the Si or SiGe atoms in the substrate and anneal out the defects present after the dry etching process and wherein the microwave radiation getters atoms or ions used in the dry etching process that are left in the lattice of the trench structure.