PROFILING OF SOFTWARE AND CIRCUIT DESIGNS UTILIZING DATA OPERATION ANALYSES

• US 20130024826A1
• Filed: 09/25/2012
• Published: 01/24/2013
• Est. Priority Date: 11/07/2002
• Status: Abandoned Application

• Current Assignee: QST Holdings LLC
• Original Assignee: QST Holdings LLC
• Inventors: Master, Paul L.
• Application Number:
  US13/626,364
• Publication Number:
  US 20130024826A1
• Time in Patent Office: Days
• US Class Current: 716/102
• CPC Class Codes: G06F 30/33 Design verification, e.g. functional simulation or model checking

Abstract

The present invention is a method, system, software and data structure for profiling programs, other code, and adaptive computing integrated circuit architectures, using a plurality of data parameters such as data type, input and output data size, data source and destination locations, data pipeline length, locality of reference, distance of data movement, speed of data movement, data access frequency, number of data load/stores, memory usage, and data persistence. The profiler of the invention accepts a data set as input, and profiles a plurality of functions by measuring a plurality of data parameters for each function, during operation of the plurality of functions with the input data set, to form a plurality of measured data parameters. From the plurality of measured data parameters, the profiler generates a plurality of data parameter comparative results corresponding to the plurality of functions and the input data set. Based upon the measured data parameters, portions of the profiled code are selected for embodiment as computational elements in an adaptive computing IC architecture.

Claims

1-60. -60. (canceled)

61. A computer-implemented method for generating a reconfigurable architecture for a hardware adaptive computing engine (ACE) on an integrated circuit having a plurality of heterogeneous nodes coupled via an interconnection network, each of the heterogeneous nodes having one or more computational elements coupled via a nodal interconnection network, and the reconfigurable architecture being reconfigurable in real time when ACE configuration code is executed, the method comprising:

profiling the ACE to make measurements of at least one data parameter of the plurality of nodes;

based on the plurality of data parameters measured, the ACE configuration code selecting one or more of the plurality of nodes to perform a computational function.