APPARATUS AND METHOD FOR AIDING IN DESIGNING ELECTRONIC CIRCUITS

• US 20130031525A1
• Filed: 07/23/2012
• Published: 01/31/2013
• Est. Priority Date: 07/28/2011
• Status: Active Grant

• Current Assignee: Fujitsu Limited
• Original Assignee: Fujitsu Limited
• Inventors: OHTSUKA, Ikuo, SAKATA, Toshiyasu
• Granted Patent: US 8,832,630 B2
• Time in Patent Office: Days
• US Class Current: 716/137
• CPC Class Codes: G06F 2113/18 Chip packaging
• CPC Class Codes: G06F 30/392 Floor-planning or layout, e.g. partitioning or placement
• CPC Class Codes: G06F 30/394 Routing G06F30/396 takes precedence
• CPC Class Codes: H05K 3/0005 for designing circuits by computer

Abstract

First and second pin groups are each formed from a plurality of pins associated with specific nets. Pins in the first pin group are to be wired to pins in the second pin group according to their associated nets. A candidate selection unit selects a set of pair candidates each specifying a first pair of pins in the first pin group and a second pair of pins in the second pin group. The first and second pairs of pins are associated with the same pair of nets, and their respective distances are within a specified range. A pair determination unit determines which pins in the first and second pin groups are to be wired in pairs, based on the pair candidates selected by the candidate selection unit.

Claims

1. A circuit design aiding apparatus, comprising:

a memory configured to store information about first and second pin groups to be wired to each other, the information including logical connection data that associates pins in the first pin group with pins in the second pin group; and

a processor configured to perform a procedure including;

selecting a set of pair candidates each specifying a first pair of pins in the first pin group and a second pair of pins in the second pin group which are associated with each other in the logical connection data and whose respective distances are within a specified range, and

determining which pins in the first and second pin groups are to be wired in pairs, based on the selected set of pair candidates.

2. The circuit design aiding apparatus according to claim 1, wherein:

first and second pair candidates are among the selected set of pair candidates; and

the determining chooses the first pair candidate in preference to the second pair candidate when the first pair candidate has a smaller number of adjacent pair candidates than the second pair candidate.

3. The circuit design aiding apparatus according to claim 2, wherein the determining chooses pairs of pins in the first and second pin groups by repeating:

newly choosing one of the pair candidate; and

removing the chosen pair candidate from the set of pair candidates, so as not to count the chosen pair candidate among the adjacent pair candidates of remaining pair candidates.

4. The circuit design aiding apparatus according to claim 2, wherein:

the determining includes calculating, for each of the first and second pair candidates when the first and second pair candidates are equal in the number of adjacent pair candidates, a first total distance that is a sum of the distance between the first pair of pins in the first pin group and the distance of the second pair of pins in the second pin group; and

the determining chooses the first pair candidate in preference to the second pair candidate when the first pair candidate has a smaller first total distance than the second pair candidate.

5. The circuit design aiding apparatus according to claim 4, wherein:

the determining further includes calculating a second total distance related to a specific pair candidate by adding up the distances of the first and second pair of pins of all the pair candidates, except the specific pair candidate, that share a common pin with the specific pair candidate;

the determining executes the calculating of the second total distance for each of the first and second pair candidates when the first and second pair candidates are equal in both the number of adjacent pair candidates and the first total distance; and

the determining chooses the first pair candidate in preference to the second pair candidate when the first pair candidate has a larger second total distance than the second pair candidate.

6. The circuit design aiding apparatus according to claim 1, wherein:

the pins in the first and second pin groups are each given an identifier that indicates a category of signals assigned thereto; and

the selecting selects each pair candidate by combining two pins having the same identifier.

7. The circuit design aiding apparatus according to claim 6, wherein

the selecting selects pair candidates by using a factor that is determined from a combination of the identifiers of two pins, the factor indicating likelihood that the two pins are chosen to be wired in a pair.

8. A circuit design aiding method, comprising:

reading, by a processor, information about first and second pin groups to be wired to each other, the information including logical connection data that associates pins in the first pin group with pins in the second pin group;

selecting, by the processor, a set of pair candidates each specifying a first pair of pins in the first pin group and a second pair of pins in the second pin group which are associated with each other by the logical connection data and whose respective distances are within a specified range; and

determining, by the processor, which pins in the first and second pin groups are to be wired in pairs, based on the selected set of pair candidates.

9. A computer-readable storage medium storing a program, the program causing a computer to perform a procedure comprising:

reading information about first and second pin groups to be wired to each other, the information including logical connection data that associates pins in the first pin group with pins in the second pin group;

selecting a set of pair candidates each specifying a first pair of pins in the first pin group and a second pair of pins in the second pin group which are associated with each other by the logical connection data and whose respective distances are within a specified range; and

determining which pins in the first and second pin groups are to be wired in pairs, based on the selected set of pair candidates.

10. A circuit design aiding apparatus comprising:

a memory configured to store information about a first pin group to be wired to a second pin group, the information including logical connection data for wiring of pins in the first pin group; and

a processor configured to perform a procedure including;

selecting a set of pair candidates each specifying a pair of pins in the first pin group whose distance is within a specified range,

determining which pins in the first pin group are to be wired in pairs, based on the selected set of pair candidates, and

assigning the logical connection data to pins in the second pin group, depending on the pin pairs chosen from the first pin group, so that the pins in the first pin group are to be wired to the pins in the second pin group according to the assigned logical connection data.

11. The circuit design aiding apparatus according to claim 10, wherein:

first and second pair candidates are among the selected set of pair candidates; and

the determining chooses the first pair candidate in preference to the second pair candidate when the first pair candidate has a smaller number of adjacent pair candidates than the second pair candidate.

12. The circuit design aiding apparatus according to claim 11, wherein the determining includes removing a chosen pair candidate from the set of pair candidates, so as not to count the chosen pair candidate among the adjacent pair candidates of remaining pair candidates.

13. The circuit design aiding apparatus according to claim 11, wherein the determining chooses the first pair candidate in preference to the second pair candidate when the first and second pair candidates are equal in the number of adjacent pair candidates, but the first pair candidate has a smaller distance of pins than the second pair candidate.

14. The circuit design aiding apparatus according to claim 13, wherein:

the determining includes calculating a total distance related to a specific pair candidate by adding up the distances of pins of all the pair candidates, except the specific pair candidate, that share a common pin with the specific pair candidate;

the determining executes the calculating of the total distance for each of the first and second pair candidates when the first and second pair candidates are equal in both the number of adjacent pair candidates and the distance of pins; and

the determining chooses the first pair candidate in preference to the second pair candidate when the first pair candidate has a larger total distance than the second pair candidate.

15. The circuit design aiding apparatus according to claim 14, wherein:

the determining chooses pairs of pins in the first pin groups by repeating;

newly choosing one of the pair candidate, and

removing the chosen pair candidate from the pair candidates, so as not to count the chosen pair candidate among the adjacent pair candidates of remaining pair candidates;

the determining calculates, for each of the first and second pair candidates, the number of adjacent pair candidates, inclusive of the chosen pair candidates, when the first and second pair candidates are equal in the total distance; and

the determining chooses the first pair candidate in preference to the second pair candidate when the first pair candidate has a smaller number of adjacent pair candidates than the second pair candidate.

16. The circuit design aiding apparatus according to claim 10, wherein:

the pins in the first and second pin groups are each given an identifier indicating a category of signals assigned thereto; and

the selecting selects each pair candidate by combining two pins having the same identifier.

17. The circuit design aiding apparatus according to claim 16, wherein the selecting selects pair candidates by using a factor that is determined from a combination of the identifiers of two pins, the factor indicating likelihood that the two pins are chosen to be wired in a pair.

18. A circuit design aiding method, comprising:

selecting, by a processor, a set of pair candidates each specifying a pair of pins in a first pin group to be wired to a second pin group, by consulting information about the first pin group to find two pins whose distance is within a specified range, the information including logical connection data for wiring of pins in the first pin group;

determining, by the processor, which pins in the first pin group are to be wired in pairs, based on the selected set of pair candidates; and

assigning, by the processor, the logical connection data to pins in the second pin group, depending on the pin pairs chosen from the first pin group, so that the pins in the first pin group are to be wired to the pins in the second pin group according to the assigned logical connection data.

19. A computer-readable storage medium storing a program, the program causing a computer to perform a procedure comprising:

selecting a set of pair candidates each specifying a pair of pins in a first pin group to be wired to a second pin group, by consulting information about the first pin group to find two pins whose distance is within a specified range, the information including logical connection data for wiring of pins in the first pin group;

determining which pins in the first pin group are to be wired in pairs, based on the selected set of pair candidates; and

assigning the logical connection data to pins in the second pin group, depending on the pin pairs chosen from the first pin group, so that the pins in the first pin group are to be wired to the pins in the second pin group according to the assigned logical connection data.