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Non-volatile Memory Cell Having A High K Dielectric And Metal Gate

  • US 20130032872A1
  • Filed: 07/26/2012
  • Published: 02/07/2013
  • Est. Priority Date: 08/05/2011
  • Status: Active Grant
First Claim
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1. A non-volatile memory cell comprising,a substantially single crystalline semiconductor substrate of a first conductivity type;

  • a first region of a second conductivity type along a surface of the substrate;

    a second region of the second conductivity type along the surface of the substrate, spaced apart from the first region;

    a channel region between the first region and the second region in the substrate along the surface thereof;

    said channel region having a first portion and a second portion, with the first portion adjacent to the first region;

    a word line having a bottom and a side, with the bottom spaced apart from the first portion of the channel region;

    said word line comprising a polysilicon portion and a metal portion with the metal portion along the bottom of the word line closest to the first portion of the channel region;

    a high K dielectric insulator between the bottom of the word line and the first portion of the channel region;

    a floating gate spaced apart from the second portion of the channel region and spaced apart and adjacent to the word line;

    a coupling gate spaced apart from the floating gate and spaced apart and adjacent to the word line; and

    an erase gate spaced apart from the second region, said erase gate adjacent to and spaced apart from the coupling gate and the floating gate.

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