BATTERY MONITORING CIRCUIT

• US 20130041607A1
• Filed: 01/25/2012
• Published: 02/14/2013
• Est. Priority Date: 08/11/2011
• Status: Active Grant

• Current Assignee: Qualcomm, Inc.
• Original Assignee: Qualcomm, Inc.
• Inventors: Zimmerman, Mark D., Yu, Baiying
• Granted Patent: US 9,075,090 B2
• Time in Patent Office: Days
• US Class Current: 702/63
• CPC Class Codes: G01R 19/16542 for batteries charge condition monitoring in G01R31/36
• CPC Class Codes: G01R 31/3835 involving only voltage measurements
• CPC Class Codes: G01R 31/389 Measuring internal impedance, internal conductance or related variables

Abstract

A battery monitoring circuit is described. The battery monitoring circuit includes a high counter that increments when a sense voltage measurement is above a threshold. The battery monitoring circuit also includes a low counter that increments when the sense voltage measurement is below the threshold. The battery monitoring circuit further includes state machine circuitry coupled to the high counter and to the low counter. The battery monitoring circuit additionally includes open circuit voltage monitoring circuitry coupled to the state machine circuitry. The battery monitoring circuit also includes resistance monitoring circuitry coupled to the state machine circuitry.

Claims

1. A battery monitoring circuit, comprising:

a high counter that increments when a sense voltage measurement is above a threshold;

a low counter that increments when the sense voltage measurement is below the threshold;

state machine circuitry coupled to the high counter and to the low counter;

open circuit voltage monitoring circuitry coupled to the state machine circuitry; and

resistance monitoring circuitry coupled to the state machine circuitry.

2. The battery monitoring circuit of claim 1, further comprising:

a coulomb counter; and

output registers for storing measurements coupled to the open circuit voltage monitoring circuitry, coupled to the coulomb counter and coupled to the resistance monitoring circuitry.

3. The battery monitoring circuit of claim 1, wherein the state machine circuitry operates according to a high-load state, a low-load state, a resistance measurement state and an open circuit voltage measurement state.

4. The battery monitoring circuit of claim 1, wherein the battery monitoring circuit operates autonomously from a software processor.

5. The battery monitoring circuit of claim 1, wherein the battery monitoring circuit uses a repurposed analog-to-digital converter.

6. The battery monitoring circuit of claim 1, wherein the battery monitoring circuit is integrated into a power management circuit.

7. The battery monitoring circuit of claim 1, wherein if the state machine circuitry indicates a low-load state, the battery monitoring circuit:

measures the sense voltage at a lower frequency;

determines whether a first low counter limit has been reached by the low counter or a first high counter limit has been reached by the high counter;

transitions, by the state machine circuitry, to a high-load state if the first high counter limit has been reached; and

transitions, by the state machine circuitry, to an open circuit voltage measurement state if the first low counter limit has been reached.

8. The battery monitoring circuit of claim 1, wherein if the state machine indicates a high-load state, the battery monitoring circuit:

measures the sense voltage at a higher frequency;

determines whether a second low counter limit has been reached by the low counter or a second meta counter limit has been reached by a meta counter;

transitions, by the state machine circuitry, to a low-load state if the second low counter limit has been reached; and

transitions, by the state machine circuitry, to a resistance measurement state if the second meta counter limit has been reached.

9. The battery monitoring circuit of claim 1, wherein if the state machine circuitry indicates an open circuit voltage measurement state, the battery monitoring circuit:

obtains a battery voltage measurement and a sense voltage measurement;

determines whether a third low counter limit has been reached by the low counter or a third meta counter limit has been reached by a meta counter;

transitions, by the state machine circuitry, to a low-load state if the third meta counter limit has been reached;

determines, by the open circuit voltage monitoring circuitry, whether a voltage is settled if the third low counter limit has been reached;

updates, by the open circuit voltage monitoring circuitry, an open circuit voltage measurement if the voltage is settled;

resets, by a controller, a coulomb counter if the voltage is settled; and

updates, by the resistance monitoring circuitry, a resistance monitoring open circuit voltage measurement if the voltage is settled and if a previous resistance monitoring battery voltage measurement and a previous resistance monitoring sense voltage measurement have been taken.

10. The battery monitoring circuit of claim 9, wherein if the state machine circuitry indicates an open circuit voltage measurement state, the battery monitoring circuit further:

determines whether a third high counter limit has been reached by the high counter, and if the third high counter limit has been reached, then;

transitions, by the state machine circuitry, to the open circuit voltage measurement state.

11. The battery monitoring circuit of claim 1, wherein if the state machine circuitry indicates a resistance measurement state, the battery monitoring circuit:

obtains a battery voltage measurement and a sense voltage measurement;

determines whether a fourth low counter limit has been reached by the low counter or a fourth high counter limit has been reached by the high counter;

transitions, by the state machine circuitry, to a high-load state if the fourth low counter limit has been reached; and

transitions, by the state machine circuitry, to the resistance measurement state if the fourth high counter limit has been reached.

12. The battery monitoring circuit of claim 11, wherein if the state machine circuitry indicates a resistance measurement state, the battery monitoring circuit further:

determines whether a fourth meta counter limit has been reached by a meta counter, and if the fourth meta counter limit has been reached, then;

updates, by the resistance monitoring circuitry, a resistance monitoring battery voltage;

updates, by the resistance monitoring circuitry, a resistance monitoring sense voltage; and

stands by, by the resistance monitoring circuitry, to update a resistance monitoring open circuit voltage.

13. The battery monitoring circuit of claim 1, wherein the battery monitoring circuit provides an open circuit voltage measurement, a consumed charge measurement, a resistance monitoring open circuit voltage measurement, a resistance monitoring battery voltage measurement and a resistance monitoring sense voltage measurement to a processor.

14. A method for monitoring a battery, comprising:

incrementing a high counter when a sense voltage measurement is above a threshold;

incrementing a low counter when the sense voltage measurement is below the threshold;

controlling a state based on a high counter limit and a low counter limit;

controlling open circuit voltage monitoring circuitry based on the state; and

controlling resistance monitoring circuitry based on the state.

15. The method of claim 14, further comprising:

controlling a coulomb counter based on the state; and

storing measurements in output registers from the open circuit voltage monitoring circuitry, the coulomb counter and the resistance monitoring circuitry based on the state.

16. The method of claim 14, wherein the state transitions between a high-load state, a low-load state, a resistance measurement state and an open circuit voltage measurement state.

17. The method of claim 14, wherein the method is performed without a software processor.

18. The method of claim 14, wherein the method uses a repurposed analog-to-digital converter.

19. The method of claim 14, wherein the method is performed by a power management circuit.

20. The method of claim 14, wherein if the state is a low-load state, the method further comprises:

measuring the sense voltage at a lower frequency;

determining whether a first low counter limit has been reached or a first high counter limit has been reached;

transitioning to a high-load state if the first high counter limit has been reached; and

transitioning to an open circuit voltage measurement state if the first low counter limit has been reached.

21. The method of claim 14, wherein if the state is a high-load state, the method further comprises:

measuring the sense voltage at a higher frequency;

determining whether a second low counter limit has been reached or a second meta counter limit has been reached;

transitioning to a low-load state if the second low counter limit has been reached; and

transitioning to a resistance measurement state if the second meta counter limit has been reached.

22. The method of claim 14, wherein if the state is an open circuit voltage measurement state, the method further comprises:

obtaining a battery voltage measurement and a sense voltage measurement;

determining whether a third low counter limit has been reached or a third meta counter limit has been reached;

transitioning to a low-load state if the third meta counter limit has been reached;

determining whether a voltage is settled if the third low counter limit has been reached;

updating an open circuit voltage measurement if the voltage is settled;

resetting a coulomb counter if the voltage is settled; and

updating a resistance monitoring open circuit voltage measurement if the voltage is settled and if a previous resistance monitoring battery voltage measurement and a previous resistance monitoring sense voltage measurement have been taken.

23. The method of claim 22, wherein if the state is an open circuit voltage measurement state, the method further comprises:

determining whether a third high counter limit has been reached, and if the third high counter limit has been reached, then;

transitioning to the open circuit voltage measurement state.

24. The method of claim 14, wherein if the state is a resistance measurement state, the method further comprises:

obtaining a battery voltage measurement and a sense voltage measurement;

determining whether a fourth low counter limit has been reached or a fourth high counter limit has been reached;

transitioning to a high-load state if the fourth low counter limit has been reached; and

transitioning to the resistance measurement state if the fourth high counter limit has been reached.

25. The method of claim 24, wherein if the state is a resistance measurement state, the method further comprises:

determining whether a fourth meta counter limit has been reached, and if the fourth meta counter limit has been reached, then;

updating a resistance monitoring battery voltage;

updating a resistance monitoring sense voltage; and

standing by to update a resistance monitoring open circuit voltage.

26. The method of claim 14, further comprising providing an open circuit voltage measurement, a consumed charge measurement, a resistance monitoring open circuit voltage measurement, a resistance monitoring battery voltage measurement and a resistance monitoring sense voltage measurement to a processor.

27. A computer-program product for monitoring a battery, comprising a non-transitory tangible computer-readable medium having instructions thereon, the instructions comprising:

code for causing a high counter to increment when a sense voltage measurement is above a threshold;

code for causing a low counter to increment when the sense voltage measurement is below the threshold;

code for causing a battery monitoring circuit to control a state based on a high counter limit and a low counter limit;

code for causing the battery monitoring circuit to control open circuit voltage monitoring circuitry based on the state; and

code for causing the battery monitoring circuit to control resistance monitoring circuitry based on the state.

28. The computer-program product of claim 27, wherein the instructions further comprise:

code for causing the battery monitoring circuit to control a coulomb counter based on the state; and

code for causing the battery monitoring circuit to store measurements in output registers from the open circuit voltage monitoring circuitry, the coulomb counter and the resistance monitoring circuitry based on the state.

29. The computer-program product of claim 27, wherein the state transitions between a high-load state, a low-load state, a resistance measurement state and an open circuit voltage measurement state.

30. The computer-program product of claim 27, wherein the battery monitoring circuit uses a repurposed analog-to-digital converter.

31. The computer-program product of claim 27, wherein the battery monitoring circuit is integrated into a power management circuit.

32. The computer-program product of claim 27, wherein the battery monitoring circuit provides an open circuit voltage measurement, a consumed charge measurement, a resistance monitoring open circuit voltage measurement, a resistance monitoring battery voltage measurement and a resistance monitoring sense voltage measurement to a processor.

33. An apparatus for monitoring a battery, comprising:

means for incrementing a high counter when a sense voltage measurement is above a threshold;

means for incrementing a low counter when the sense voltage measurement is below the threshold;

means for controlling a state based on a high counter limit and a low counter limit;

means for controlling open circuit voltage monitoring circuitry based on the state; and

means for controlling resistance monitoring circuitry based on the state.

34. The apparatus of claim 33, further comprising:

means for controlling a coulomb counter based on the state; and

means for storing measurements in output registers from the open circuit voltage monitoring circuitry, the coulomb counter and the resistance monitoring circuitry based on the state.

35. The apparatus of claim 33, wherein the state transitions between a high-load state, a low-load state, a resistance measurement state and an open circuit voltage measurement state.

36. The apparatus of claim 33, wherein the apparatus uses a repurposed analog-to-digital converter.

37. The apparatus of claim 33, wherein the apparatus is integrated into a power management circuit.

38. The apparatus of claim 33, wherein the apparatus provides an open circuit voltage measurement, a consumed charge measurement, a resistance monitoring open circuit voltage measurement, a resistance monitoring battery voltage measurement and a resistance monitoring sense voltage measurement to a processor.