2N+1 LEVEL VOLTAGE INVERTER

• US 20130044526A1
• Filed: 05/17/2012
• Published: 02/21/2013
• Est. Priority Date: 05/17/2011
• Status: Active Grant

• Current Assignee: GE Energy Power Conversion Technology Limited (General Electric Company)
• Original Assignee: Converteam Technology Ltd. (General Electric Company)
• Inventors: Soua, Samir
• Granted Patent: US 9,071,165 B2
• Time in Patent Office: Days
• US Class Current: 363/131
• CPC Class Codes: H02M 1/0095 Hybrid converter topologies, e.g. NPC mixed with flying capacitor, thyristor converter mixed with MMC or charge pump mixed with buck
• CPC Class Codes: H02M 7/4837 Flying capacitor converters
• CPC Class Codes: H02M 7/487 Neutral point clamped inverters

Abstract

This system for converting a direct input voltage into an alternating output voltage comprises two input terminals, two voltage generators connected in series between the input terminals and connected to one another by a middle point, as well as, for each phase of the alternating voltage, an output terminal, two switching branches each connected between the output terminal and a respective input terminal, each switching branch comprising N first switching cells connected in series and N−1 intermediate points, the first switching cells successively being connected to one another by a corresponding intermediate point, N being an integer greater than or equal to 2, and control means for controlling the first switching cells. The system includes, for each phase of the alternating voltage, N−1 pair(s) of capacitors, each pair of capacitors being connected between intermediate points of one of the two switching branches and the other of the two switching branches.

Claims

1. A system for converting a direct input voltage into an alternating output voltage comprising at least one phase, the conversion system including:

two input terminals,

two voltage generators connected in series between the input terminals and connected to one another by a middle point,

for the or each phase of the output voltage;

an output terminal,

two switching branches each connected between the output terminal and a respective input terminal, each switching branch comprising N first switching cells connected in series and N−

1 intermediate points, the first switching cells successively being connected to one another by a corresponding intermediate point, N being an integer greater than or equal to 2, and

control means for controlling the first switching cells,

wherein the system also comprises;

for the or each phase of the output voltage;

N−

1 pairs of capacitors, each pair of capacitors being connected between an intermediate point of one of the two switching branches and an intermediate point of the other of the two switching branches, the two capacitors of each pair being connected to one another by a middle point,

N second switching cells, one among the N second cells being connected between the output terminal and a middle point, and each of the N−

1 other second cell(s) being connected between two middle points, and

means for controlling the second switching cells,

and in that the control means are capable of controlling the switching of the first and second corresponding cells according to a control law, and the control law is such that the current flows, for at least one given value of the alternating output voltage, through a corresponding capacitor in one direction during a first phase, then in the other direction during a second phase.

2. The system according to claim 1, wherein each first switching cell comprises at least one first bidirectional current switch.

3. The system according to claim 2, wherein the first switches of the two switching branches are connected in series and in the same direction between the two output terminals.

4. The system according to claim 2, wherein each first switch comprises a transistor and a diode connected in anti-parallel relative to the transistor.

5. The system according to claim 1, wherein each second switching cell is bidirectional in current and voltage.

6. The system according to claim 5, wherein each second switching cell comprises at least two second switches connected in opposite series.

7. The system according to claim 6, wherein each second switch comprises a transistor and a diode that are connected in anti-parallel relative to the transistor.

8. The system according to claim 5, wherein each second switching cell comprises two second switches connected in anti-parallel.

9. The system according to claim 8, wherein each second switch comprises at least one diode, a transistor connected in series with the diode, and another diode connected in anti-parallel relative to the transistor.