METHOD FOR FABRICATING FIELD EFFECT TRANSISTOR WITH FIN STRUCTURE

• US 20130045576A1
• Filed: 08/19/2011
• Published: 02/21/2013
• Est. Priority Date: 08/19/2011
• Status: Active Grant

• Current Assignee: Marlin Semiconductor Limited (f/k/a Sandyford Semiconductor Limited) (Vector Capital Corporation)
• Original Assignee: United Microelectronics Corporation
• Inventors: Tsai, Shih-Hung, Huang, Rai-Min, Lin, Chien-Ting
• Granted Patent: US 8,853,013 B2
• Time in Patent Office: Days
• US Class Current: 438/151
• CPC Class Codes: H01L 29/7854 with rounded corners

Abstract

A method for fabricating a field effect transistor with fin structure includes the following sequences. First, a substrate is provided and at least a fin structure is formed on the substrate. Then, an etching process is performed to round at least an upper edge in the fin structure. Finally, a gate covering the fin structure is formed.

Claims

1. A method for fabricating a field effect transistor with fin structure, comprising:

providing a substrate;

forming at least a fin structure on the substrate;

performing an etching process to round at least an upper edge in the fin structure;

forming a gate covering the fin structure; and

forming a source and a drain at each side of the gate.

2. A method for fabricating a field effect transistor with fin structure according to claim 1, wherein the substrate is a bulk silicon substrate or a silicon-on-insulator (SOI) substrate.

3. A method for fabricating a field effect transistor with fin structure according to claim 2, wherein the step of forming the fin structure on the substrate further comprises:

forming a patterned hard mask on the substrate; and

transferring pattern of the patterned hard mask into the substrate to form the fin structure thereon.

4. A method for fabricating a field effect transistor with fin structure according to claim 3, further comprising:

before performing the etching process, pulling back the patterned hard mask to expose portion of the top surface of the fin structure from the patterned hard mask.

5. A method for fabricating a field effect transistor with fin structure according to claim 4, wherein the pull back process comprises a wet etch process or plasma etch process.

6. A method for fabricating a field effect transistor with fin structure according to claim 1, further comprising:

after performing the etching process, forming at least an insulation structure on the substrate, wherein the insulation structure butted contacts the fin structure.

7. A method for fabricating a field effect transistor with fin structure according to claim 1, wherein the step of forming the fin structure further comprises performing an epitaxial growth process to form the fin structure on the substrate.

8. A method for fabricating a field effect transistor with fin structure according to claim 7, wherein the fin structure comprises a silicon layer, silicon-germanium layer or the combination thereof.

9. A method for fabricating a field effect transistor with fin structure according to claim 1, wherein the etching process etches at least a sidewall of the fin structure.

10. A method for fabricating a field effect transistor with fin structure, comprising:

providing a substrate;

forming at least a fin structure on the substrate having a patterned hard mask on a top surface of the substrate;

performing a pull back process to expose portion of the top surface of the fin structure from the patterned hard mask;

performing an etching process to round at least an upper edge in the fin structure;

removing the patterned hard mask;

forming a gate covering the fin structure; and

forming a source and a drain at each side of the gate.

11. A method for fabricating a field effect transistor with fin structure according to claim 10, wherein the substrate comprises a bulk silicon substrate or silicon-on-insulator substrate.

12. A method for fabricating a field effect transistor with fin structure according to claim 10, wherein the fin structure comprises a silicon layer, silicon-germanium layer or the combination thereof.

13. A method for fabricating a field effect transistor with fin structure according to claim 10, wherein the pull back process comprises a wet etch process or plasma etch process.

14. A method for fabricating a field effect transistor with fin structure according to claim 10, wherein the etching process can etch at least a sidewall of the fin structure.

15. A method for fabricating a field effect transistor with fin structure according to claim 10, further comprising:

after performing an etching process to round at least an upper edge in the fin structure, forming at least an insulation structure on the substrate, wherein the insulation structure contacts the fin structure.