MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE HAVING METAL GATE

• US 20130045594A1
• Filed: 08/18/2011
• Published: 02/21/2013
• Est. Priority Date: 08/18/2011
• Status: Active Grant

• Current Assignee: United Microelectronics Corporation
• Original Assignee: Szu-Hao Lai
• Inventors: Wang, Yu-Ren, Sun, Te-Lin, Lai, Szu-Hao, Chen, Po-Chun, Lin, Chih-Hsun, Tsai, Che-Nan, Lin, Chun-Ling, Yeh, Chiu-Hsien
• Granted Patent: US 8,551,876 B2
• Time in Patent Office: Days
• US Class Current: 438/589
• CPC Class Codes: H01L 21/28088 the final conductor layer next to the insulator being a composite, e.g. TiN
• CPC Class Codes: H01L 21/823842 gate conductors with different gate conductor materials or different gate conductor implants, e.g. dual gate structures
• CPC Class Codes: H01L 29/4966 the conductor material next to the insulator being a composite material, e.g. organic material, TiN, MoSi2 H01L29/4908, H01L29/4983 take precedence
• CPC Class Codes: H01L 29/517 the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate H01L29/518 takes precedence
• CPC Class Codes: H01L 29/66545 using a dummy, i.e. replacement gate in a process wherein at least a part of the final gate is self aligned to the dummy gate
• CPC Class Codes: H01L 29/7848 the means being located in the source/drain region, e.g. SiGe source and drain

Abstract

A manufacturing method for a semiconductor device having a metal gate includes providing a substrate having at least a first semiconductor device formed thereon, forming a first gate trench in the first semiconductor device, forming a first work function metal layer in the first gate trench, and performing a decoupled plasma oxidation to the first work function metal layer.

Claims

1. A manufacturing method for a semiconductor device having a metal gate comprising:

providing a substrate having at least a first semiconductor device and a second semiconductor device formed thereon, the first semiconductor device being a p-type semiconductor device and the second semiconductor device being an n-type semiconductor device;

forming a first gate trench in the first semiconductor device and a second gate trench in the second semiconductor device;

forming a first work function metal layer in the first gate trench after forming the first gate trench;

performing a decoupled plasma oxidation (DPO) to the first work function metal layer;

forming a second work function metal layer in the second gate trench after the DPO; and

performing a decoupled plasma nitridation (DPN) to the second work function metal layer.

2. The manufacturing method for the semiconductor device having the metal gate according to claim 1, wherein the DPO is performed at a process temperature, and the process temperature is lower than 400°

C.

3. The manufacturing method for the semiconductor device having the metal gate according to claim 2, wherein the process temperature is between a room temperature and 200°

C.

4. The manufacturing method for the semiconductor device having the metal gate according to claim 1, wherein the DPO comprises introducing nitrogen (N) or argon (Ar).

8. The manufacturing method for the semiconductor device having the metal gate according to claim 1, wherein the DPN is performed at a process temperature, and the process temperature is lower than 400°

C.

9. The manufacturing method for the semiconductor device having the metal gate according to claim 8, wherein the process temperature is between a room temperature and 200°

C.

10. The manufacturing method for the semiconductor device having the metal gate according to claim 1, wherein the DPN comprises introducing N or Ar.

11. The manufacturing method for the semiconductor device having the metal gate according to claim 1, further comprising performing a thermal treatment after the DPN.

12. The manufacturing method for the semiconductor device having the metal gate according to claim 11, wherein the thermal treatment is performed at a process temperature lower than 400°

C.

15. The manufacturing method for the semiconductor device having the metal gate according to claim 1, wherein the first gate trench and the second gate trench are simultaneously formed.

16. The manufacturing method for the semiconductor device having the metal gate according to claim 1, further comprising forming a filling metal, and the filling metal fills up the first gate trench.

5-7. -7. (canceled)

13-14. -14. (canceled)

17. A manufacturing method for a semiconductor device having a metal gate comprising:

providing a substrate having at least a first semiconductor device and a second semiconductor device formed thereon, the first semiconductor device being a p-type semiconductor device and the second semiconductor device being an n-type semiconductor device;

forming a first gate trench in the first semiconductor device and a second gate trench in the second semiconductor device;

forming a second work function metal layer in the second gate trench after forming the second gate trench;

performing a decoupled plasma nitridation (DPN) to the second work function metal layer;

forming a first work function metal layer in the first gate trench after the DPN; and

performing a decoupled plasma oxidation (DPO) to the first work function metal layer.

18. The manufacturing method for the semiconductor device having the metal gate, according to claim 17, wherein the DPO is performed at a process temperature, and the process temperature is lower than 400°

C.

19. The manufacturing method for the semiconductor device having the metal gate, according to claim 17, further comprising performing a thermal treatment after the DPO.

20. The manufacturing method for the semiconductor device having the metal gate, according to claim 17, further comprising performing a thermal treatment after the DPN.