HIGH SPEED MULTIPLE MEMORY INTERFACE I/O CELL
First Claim
1. A calibration circuit comprising:
- an amplifier having a first input, a second input, and an output, wherein said first input receives a reference signal;
a current steering digital-to-analog converter (DAC) having a first input coupled to the output of said amplifier, a first output coupled to the second input of said amplifier, and a second output coupled to a circuit node;
a comparator having a first input receiving said reference signal, a second input coupled to said circuit node, and an output at which an output of said calibration circuit is presented;
a slew calibration network coupled to said circuit node and configured to adjust a slew rate of said calibration circuit; and
an on-die termination (ODT) network coupled to said circuit node.
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0 Petitions
Accused Products
Abstract
A calibration circuit includes an amplifier, a current steering digital-to-analog converter (DAC), a comparator, a slew calibration network, and an on-die termination (ODT) network. The amplifier generally has a first input, a second input, and an output. The first input generally receives a reference signal. The current steering digital-to-analog converter (DAC) generally has a first input coupled to the output of the amplifier, a first output coupled to the second input of the amplifier, and a second output coupled to a circuit node. The comparator generally has a first input receiving the reference signal, a second input coupled to the circuit node, and an output at which an output of the calibration circuit may be presented. The slew calibration network is generally coupled to the circuit node and configured to adjust a slew rate of the calibration circuit. The on-die termination (ODT) network is generally coupled to the circuit node.
10 Citations
16 Claims
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1. A calibration circuit comprising:
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an amplifier having a first input, a second input, and an output, wherein said first input receives a reference signal; a current steering digital-to-analog converter (DAC) having a first input coupled to the output of said amplifier, a first output coupled to the second input of said amplifier, and a second output coupled to a circuit node; a comparator having a first input receiving said reference signal, a second input coupled to said circuit node, and an output at which an output of said calibration circuit is presented; a slew calibration network coupled to said circuit node and configured to adjust a slew rate of said calibration circuit; and an on-die termination (ODT) network coupled to said circuit node. - View Dependent Claims (2, 3, 4, 5, 6, 7, 12, 13, 14, 15, 16)
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- 8. The calibration circuit according to claim wherein ODT calibration network comprises a p-channel ODT network and an n-channel ODT network.
Specification