DRIVING CIRCUIT, DISPLAY, AND METHOD OF DRIVING THE DISPLAY

• US 20130050286A1
• Filed: 08/06/2012
• Published: 02/28/2013
• Est. Priority Date: 08/31/2011
• Status: Abandoned Application

• Current Assignee: Sony Corporation (Sony Group Corp.)
• Original Assignee: Sony Corporation (Sony Group Corp.)
• Inventors: Yoshinaga, Tomoro, Ichitsubo, Taro
• Application Number:
  US13/567,675
• Publication Number:
  US 20130050286A1
• Time in Patent Office: Days
• US Class Current: 345/690
• CPC Class Codes: G09G 2320/0209 Crosstalk reduction, i.e. to reduce direct or indirect influences of signals directed to a certain pixel of the displayed image on other pixels of said image, inclusive of influences affecting pixels in different frames or fields or sub-images which constitute a same image, e.g. left and right images of a stereoscopic display
• CPC Class Codes: G09G 2320/0266 Reduction of sub-frame artefacts
• CPC Class Codes: G09G 2320/0271 Adjustment of the gradation levels within the range of the gradation scale, e.g. by redistribution or clipping
• CPC Class Codes: G09G 3/2022 using sub-frames
• CPC Class Codes: G09G 3/36 using liquid crystals
• CPC Class Codes: G09G 3/3648 using an active matrix G09G3/367 - G09G3/3696 take precedence
• CPC Class Codes: G09G 3/38 using electrochromic devices
• CPC Class Codes: H04N 7/173 with two-way working, e.g. subscriber sending a programme selection signal

Abstract

There is provided a driving circuit driving pixels in a display, the pixels each including a liquid crystal cell and a memory. The driving circuit includes: a dividing section dividing one frame period into subfields, the subfields corresponding to respective bits of gray-scale data and having period lengths commensurate with weights of the corresponding bits; a correction section correcting, when bit sequences of two sets of gray-scale data corresponding to two pixels adjacent to each other differ from each other, gray-scale data having a higher gray-scale level out of the two set of gray-scale data, to further increase the gray-scale level thereof; and an ON-OFF period control section controlling a ratio of an ON period or an OFF period to one frame period by bringing the liquid crystal cell of the pixel into an on state or an off state according to a corresponding bit in each of the subfields.

Claims

1. A driving circuit configured to drive pixels in a display in which the pixels are disposed in a matrix, each of the pixels including a liquid crystal cell and a memory, the driving circuit comprising:

a dividing section dividing one frame period into a plurality of subfields, the subfields corresponding to respective bits of gray-scale data and having period lengths commensurate with weights of the corresponding bits;

a correction section correcting, when bit sequences of two sets of gray-scale data corresponding to two pixels adjacent to each other differ from each other, gray-scale data having a higher gray-scale level out of the two set of gray-scale data, to further increase the gray-scale level thereof; and

an ON-OFF period control section controlling a ratio of an ON period or an OFF period to one frame period by bringing the liquid crystal cell of the pixel into an on state or an off state according to a corresponding bit in each of the subfields.

2. The driving circuit according to claim 1, wherein, on a frame by frame basis, the correction section adds a correction value common to all pixels to gray-scale data corresponding to all pixels, and periodically changes the correction value.

3. A display including a display region in which pixels each including a liquid crystal cell and a memory are disposed in a matrix, and a driving circuit driving the pixels, the driving circuit comprising:

a dividing section dividing one frame period into a plurality of subfields, the subfields corresponding to respective bits of gray-scale data and having period lengths commensurate with weights of the corresponding bits,

a correction section correcting, when bit sequences of two sets of gray-scale data corresponding to two pixels adjacent to each other differ from each other, gray-scale data having a higher gray-scale level out of two sets of gray-scale data, to further increase the gray-scale level thereof, and

an ON-OFF period control section controlling a ratio of an ON period or an OFF period to one frame period by bringing the liquid crystal cell of the pixel into an on state or an off state according to a corresponding bit in each of the subfields.

4. A method of driving a display in which pixels each including a liquid crystal cell and a memory are disposed in matrix, the method comprising:

dividing one frame period into a plurality of subfields, the subfields corresponding to respective bits of gray-scale data and having period lengths commensurate with weights of the corresponding bits;

when bit sequences of two sets of gray-scale data corresponding to two pixels adjacent to each other differ from each other, correcting gray-scale data having a higher gray-scale level out of two sets of gray-scale data, to further increase the gray-scale level thereof; and

controlling a ratio of an ON period or an OFF period to one frame period by bringing the liquid crystal of the pixel into an on state or an off state according to a corresponding bit in each of the subfields.