CIRCUIT FOR GENERATING WRITE SIGNAL, VARIABLE RESISTANCE MEMORY DEVICE, AND METHOD FOR PROGRAMMING VARIABLE RESISTANCE MEMORY
First Claim
Patent Images
1. A circuit for generating a write signal, the circuit comprising:
- a pre-emphasis signal generator that receives location information of a to-be-programmed memory cell and generates a pre-emphasis signal depending on the location information of the to-be-programmed memory cell; and
a write driver that generates a program signal corresponding to data to be programmed in the to-be-programmed memory cell, generates a write signal by combining the program signal with the pre-emphasis signal supplied from the pre-emphasis signal generator, and outputs the write signal to the to-be-programmed memory cell.
1 Assignment
0 Petitions
Accused Products
Abstract
A circuit for generating a write signal includes a pre-emphasis signal generator that receives location information of a to-be-programmed memory cell and generates a pre-emphasis signal depending on the location information of the to-be-programmed memory cell, and a write driver that generates a program signal corresponding to data to be programmed in the to-be-programmed memory cell. A write signal is generated by combining the program signal with the pre-emphasis signal supplied from the pre-emphasis signal generator, and the write signal output to the to-be-programmed memory cell.
-
Citations
20 Claims
-
1. A circuit for generating a write signal, the circuit comprising:
-
a pre-emphasis signal generator that receives location information of a to-be-programmed memory cell and generates a pre-emphasis signal depending on the location information of the to-be-programmed memory cell; and a write driver that generates a program signal corresponding to data to be programmed in the to-be-programmed memory cell, generates a write signal by combining the program signal with the pre-emphasis signal supplied from the pre-emphasis signal generator, and outputs the write signal to the to-be-programmed memory cell. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13)
-
-
14. A variable resistance memory device comprising:
-
a memory cell array including a plurality of variable resistance memory cells; an address decoder that receives address information and outputs location information of a to-be-programmed memory cell among the plurality of variable resistance memory cells; a pre-emphasis signal generator that receives the location information of the to-be-programmed memory cell from the address decoder and generates a pre-emphasis signal depending on the location information of the to-be-programmed memory cell; and a write driver that generates a program signal corresponding to data to be programmed in the to-be-programmed memory cell, generates a write signal by combining the program signal with the pre-emphasis signal supplied from the pre-emphasis signal generator, and outputs the write signal to the to-be-programmed memory cell. - View Dependent Claims (15)
-
-
16. A method of programming a memory device including a write driver operatively connected to a memory cell array, the memory cell array including a plurality of variable resistance memory cells, the method comprising:
-
generating a write signal in accordance with a write data to be programmed in a to-be-programmed variable resistance memory cell of the memory cell array; generating a pre-emphasis signal in accordance with a relative location of the to-be-programmed variable resistance memory cell within the memory cell array; combining the write signal and the pre-emphasis signal to generate a program signal; and applying the program signal to the to-be-programmed variable resistance memory cell. - View Dependent Claims (17, 18, 19, 20)
-
Specification