ELECTRO-ACOUSTIC TRANSDUCER AND METHOD OF MANUFACTURING THE SAME

• US 20130051179A1
• Filed: 02/21/2012
• Published: 02/28/2013
• Est. Priority Date: 08/23/2011
• Status: Active Grant

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: HONG, Seog-woo
• Granted Patent: US 9,120,126 B2
• Time in Patent Office: Days
• US Class Current: 367/140
• CPC Class Codes: B06B 1/02 making use of electrical energy B06B1/18, B06B1/20 take precedence
• CPC Class Codes: B32B 2457/14 Semiconductor wafers
• CPC Class Codes: H01L 2224/16145 the bodies being stacked
• CPC Class Codes: H01L 2224/81805 involving forming a eutectic alloy at the bonding interface
• CPC Class Codes: H01L 23/481 Internal lead connections, e.g. via connections, feedthrough structures
• CPC Class Codes: H01L 24/81 using a bump connector
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/01322 Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
• CPC Class Codes: H10N 30/87 Electrodes or interconnections, e.g. leads or terminals
• CPC Class Codes: Y10T 156/1056 Perforating lamina

Abstract

Electro-acoustic transducers and methods of manufacturing the electro-acoustic transducer are provided. An electro-acoustic transducer includes: a first wafer including a first substrate in which a plurality of electro-acoustic transducer cells are formed; and a second wafer disposed in a lower portion of the first wafer, and including a second substrate in which a plurality of through wafer vias are formed. A method of manufacturing an electro-acoustic transducer includes: forming a plurality of electro-acoustic transducer cells in a first substrate of a first wafer; forming a plurality of through wafer vias in a second substrate of a second wafer; and bonding the first and second wafers to each other.

Claims

1. An electro-acoustic transducer comprising:

a first wafer comprising a first substrate in which a plurality of electro-acoustic transducer cells are formed; and

a second wafer disposed on a lower portion of the first wafer, the second wafer comprising a second substrate in which a plurality of through wafer vias are formed.

2. The electro-acoustic transducer of claim 1, wherein the first and second wafers are bonded to each other by eutectic bonding.

3. The electro-acoustic transducer of claim 1, wherein the first wafer comprises:

a support unit disposed on the first substrate and in which a plurality of through holes are formed;

a first insulating layer disposed on bottom surfaces of the plurality of through holes; and

a thin film disposed on the support unit.

4. The electro-acoustic transducer of claim 3, further comprising an electrode layer disposed on the thin film.

5. The electro-acoustic transducer of claim 3, further comprising a first via passing through the first substrate and the support unit.

6. The electro-acoustic transducer of claim 5, wherein the first via comprises:

a second via formed passing through the first substrate positioned in a lower portion of the support unit; and

a third via formed passing through the support unit and connected to the second via.

7. The electro-acoustic transducer of claim 5, further comprising:

a first electrode pad disposed in the first via and on a lower surface of the first substrate; and

a second electrode pad disposed on the lower surface of the first substrate and spaced apart from the first electrode pad.

8. The electro-acoustic transducer of claim 7, further comprising a second insulating layer disposed on an inner wall of the first via and the lower surface of the first substrate, the second insulating layer insulating the first substrate from the first electrode pad.

9. The electro-acoustic transducer of claim 4, wherein the electrode layer is electrically connected to a first electrode pad disposed in a first via formed passing through the first substrate and the support unit through a fourth via formed in the thin film.

10. The electro-acoustic transducer of claim 7, wherein the plurality of through wafer vias comprise:

a first through wafer via filled with a first conductive material electrically connected to the first electrode pad; and

a second through wafer via filled with a second conductive material electrically connected to the second electrode pad.

11. The electro-acoustic transducer of claim 10, further comprising a plurality of electrode pads disposed on top and bottom surfaces of the first and second through wafer vias.

12. The electro-acoustic transducer of claim 11, wherein the plurality of electrode pads comprise:

a third electrode pad disposed on a top surface of the second substrate and electrically connected to the first conductive material filled in the first through wafer via; and

a fourth electrode pad disposed on the top surface of the second substrate and electrically connected to the second conductive material filled in the second through wafer via.

13. The electro-acoustic transducer of claim 12, wherein the first electrode pad is connected to the third electrode pad by eutectic bonding and the second electrode pad is connected to the fourth electrode pad by eutectic bonding.

14. A method of manufacturing an electro-acoustic transducer, the method comprising:

forming a plurality of electro-acoustic transducer cells in a first substrate of a first wafer;

forming a plurality of through wafer vias in a second substrate of a second wafer; and

bonding the first wafer and the second wafer to each other.

15. The method of claim 14, wherein the bonding the first wafer and the second wafer comprises bonding the first wafer and the second wafer to each other by eutectic bonding.

16. The method of claim 14, wherein the forming the plurality of electro-acoustic transducer cells comprises:

forming a support unit in which a plurality of through holes are formed on the first substrate;

forming a first insulating layer disposed on bottom surfaces of the plurality of through holes; and

forming a thin film on the support unit.

17. The method of claim 16, wherein the forming the support unit comprises forming the support unit by oxidizing a part of the first substrate.

18. The method of claim 16, wherein the forming the thin film comprises:

attaching a silicon on insulator (SOI) wafer to the support unit, the SOI wafer comprising a device wafer, an insulating layer, and a handle wafer; and

removing the insulating layer and the handle wafer, and leaving the device wafer on the support unit.

19. The method of claim 16, further comprising:

forming a first via passing through the first substrate and the support unit;

forming a first electrode pad disposed in the first via and on a lower surface of the first substrate; and

forming a second electrode pad disposed on the lower surface of the first substrate, the second electrode pad being spaced apart from the first electrode pad.

20. The method of claim 19, wherein the forming the first via comprises:

forming a second via passing through the first substrate disposed in a lower portion of the support unit; and

forming a third via passing through the support unit and connected to the second via.

21. The method of claim 19, further comprising:

forming a fourth via in the thin film to expose the first electrode pad; and

forming an electrode layer on the thin film and electrically connecting the electrode layer and the first electrode pad through the fourth via.

22. The method of claim 19, further comprising forming a second insulating layer disposed on an inner wall of the first via and the lower surface of the first substrate, the second insulating layer insulating the first substrate from the first electrode pad.

23. The method of claim 19, further comprising:

forming first and second through wafer vias spaced apart from each other in the second substrate;

filling the first and second through wafer vias with first and second conductive materials, respectively; and

forming a third electrode pad connected to the first conductive material filled in the first through wafer via and a fourth electrode pad connected to the second conductive material filled in the second through wafer via.

24. The method of claim 23, wherein the first electrode pad is connected to the third electrode pad by eutectic bonding and the second electrode pad is connected to the fourth electrode pad by eutectic bonding.

25. The method of claim 23, further comprising:

forming a third insulating layer in upper and lower surfaces of the second substrate and inner walls of the first and second through wafer vias.