Buried Gate Transistor
First Claim
1. A method of making a semiconductor device, the method comprising:
- forming a recess in a surface of a semiconductor body;
forming a dielectric liner in the recess;
forming a gate electrode in the recess; and
after forming the gate electrode, forming first and second highly doped source/drain regions in the semiconductor body, the first and second highly doped source/drain regions being laterally spaced by the gate electrode.
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Abstract
An embodiment of the invention provides a semiconductor fabrication method. The method comprises forming an isolation region between a first and a second region in a substrate, forming a recess in the substrate surface, and lining the recess with a uniform oxide. Embodiments further include doping a channel region under the bottom recess surface in the first and second regions and depositing a gate electrode material in the recess. Preferred embodiments include forming source/drain regions adjacent the channel region in the first and second regions, preferably after the step of depositing the gate electrode material. Another embodiment of the invention provides a semiconductor device comprising a recess in a surface of the first and second active regions and in the isolation region, and a dielectric layer having a uniform thickness lining the recess.
21 Citations
20 Claims
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1. A method of making a semiconductor device, the method comprising:
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forming a recess in a surface of a semiconductor body; forming a dielectric liner in the recess; forming a gate electrode in the recess; and after forming the gate electrode, forming first and second highly doped source/drain regions in the semiconductor body, the first and second highly doped source/drain regions being laterally spaced by the gate electrode. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A method of making a semiconductor device, the method comprising:
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providing a semiconductor body with a first active region, a second active region, and an isolation region between the first active region and the second active region; forming a recess in a surface of the semiconductor body, the recess extending across the first active region, the isolation region and the second active region; forming a gate dielectric within the recess; forming a gate electrode in the recess; and forming first and second source/drain regions in the first active region and third and fourth source/drain regions in the second active region, the first source/drain region being spaced from the second source/drain region by the gate electrode and third source/drain region being spaced from the fourth source/drain region by the gate electrode. - View Dependent Claims (10, 11, 12, 13)
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14. A method of making a buried gate, the method comprising:
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forming a recess in a surface of a semiconductor body; forming a high-k dielectric liner in the recess; forming a doped channel in a bottom surface of the recess; forming a gate electrode in the recess; and after forming the gate electrode, forming first and second highly doped source/drain regions in the semiconductor body, the first and second highly doped source/drain regions being laterally spaced by the gate electrode. - View Dependent Claims (15, 16, 17, 18, 19, 20)
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Specification