Dynamically Allocating A Power Budget Over Multiple Domains Of A Processor
First Claim
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1. An apparatus comprising:
- a multi-domain processor including a first domain and a second domain, each of the first and second domains to operate at an independent voltage and frequency, the multi-domain processor further including first logic to dynamically allocate a power budget for the multi-domain processor between the first and second domains at run time.
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Abstract
In one embodiment, the present invention includes a method for determining a power budget for a multi-domain processor for a current time interval, determining a portion of the power budget to be allocated to first and second domains of the processor, and controlling a frequency of the domains based on the allocated portions. Such determinations and allocations can be dynamically performed during runtime of the processor. Other embodiments are described and claimed.
186 Citations
20 Claims
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1. An apparatus comprising:
a multi-domain processor including a first domain and a second domain, each of the first and second domains to operate at an independent voltage and frequency, the multi-domain processor further including first logic to dynamically allocate a power budget for the multi-domain processor between the first and second domains at run time. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A method comprising:
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determining, in a power controller of a multi-domain processor, a power budget for the multi-domain processor for a current time interval, the multi-domain processor including at least a first domain and a second domain; determining, in the power controller, a portion of the power budget to be allocated to the first and second domains; and controlling a frequency of the first domain and a frequency of the second domain based on the allocated portions. - View Dependent Claims (10, 11, 12, 13, 14)
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15. A system comprising:
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a multicore processor having a first domain including a plurality of cores, a second domain including a graphics engine, and a third domain including system agent circuitry, the third domain to operate at a fixed power budget and to dynamically allocate a variable power budget between the first and second domains; and a dynamic random access memory (DRAM) coupled to the multicore processor. - View Dependent Claims (16, 17, 18, 19, 20)
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Specification