FREQUENCY CALIBRATION METHOD AND SATELLITE POSITIONING SYSTEM UTILIZING THE METHOD

• US 20130063305A1
• Filed: 03/08/2012
• Published: 03/14/2013
• Est. Priority Date: 02/18/2009
• Status: Abandoned Application

• Current Assignee: MediaTek, Inc.
• Original Assignee: MediaTek, Inc.
• Inventors: Yeh, Hsin-Chung, Lo, Chi-Yeh
• Application Number:
  US13/415,820
• Publication Number:
  US 20130063305A1
• Time in Patent Office: Days
• US Class Current: 342/357.62
• CPC Class Codes: G01S 19/235 Calibration of receiver components
• CPC Class Codes: H03L 1/027 by using frequency conversion means which is variable with temperature, e.g. mixer, frequency divider, pulse add/substract logic circuit H03L1/023, H03L1/026 take precedence
• CPC Class Codes: H03L 7/16 Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop

Abstract

A frequency calibration method and a satellite positioning system utilizing the frequency calibration method are disclosed. The frequency calibration method includes the following steps: detecting a plurality of chip state parameters; and determining a frequency drift and a frequency variation of a target signal according to the detected chip state parameters.

Claims

1. A frequency calibration method for calibrating a frequency center and a variation of the frequency center of a target signal used in a chip, comprising:

detecting a plurality of chip state parameters; and

determining a frequency drift and a frequency variation of the target signal according to the detected chip state parameters.

2. The method of claim 1, further comprising:

calibrating a frequency center of the target signal according to the frequency drift; and

calculating a variation of the frequency center according to the frequency variation.

3. The method of claim 1, wherein the chip state parameters comprise a thermal parameter of the chip.

4. The method of claim 1, wherein the chip comprises a voltage control oscillator, wherein the chip state parameters comprise a VCO sub-band parameter, or a V_tune parameter, wherein the VCO sub-band parameter indicates the range that the voltage control oscillator can support, and the V_tune parameter indicates the number of sub-bands that can be utilized.

5. The method of claim 1, wherein the chip comprises a voltage control oscillator, and the chip state parameters comprises a frequency range that the voltage control oscillator can support.

6. The method of claim 1, wherein the chip is for a satellite positioning system, and the method further comprising:

determining a satellite searching range of the satellite positioning system according to the frequency variation.

7. The method of claim 6, wherein the satellite positioning system comprises an oscillator for generating a clock signal, and the method further comprises:

generating the target signal according to the clock signal; and

down converting an RF signal according to the target signal.

8. The method of claim 6, further comprising:

down converting an RF signal to generate the target signal;

converting the target signal to a digital IF signal; and

converting the digital IF signal to a baseband signal.

9. The method of claim 6, further comprising:

down converting an RF signal to generate an IF signal;

converting the IF signal to the target signal; and

converting the target signal to a baseband signal.

10. A satellite positioning system, comprising:

an oscillator for generating a clock signal;

a chip, for receiving a satellite signal to generate a baseband signal according to the clock signal, comprising;

an IF down converter, for down converting an RF signal to generate a first signal;

an ADC, for converting the first signal to a second signal;

a baseband signal generator, for converting the second signal to the baseband signal;

a PLL, for generating a third signal according to the clock signal; and

a processor, for detecting a plurality of chip state parameters; and

determining a frequency drift and a frequency variation according to a plurality of chip state parameters.

11. The system of claim 10, wherein the processor further calibrates a frequency center of at least one of the first signal, the second signal and the third signal according to the frequency drift;

and calculates a variation of the frequency center according to the frequency variation.

12. The system of claim 10, wherein the chip state parameter detector is a thermal detector and the chip state parameter comprises a temperature of the chip.

13. The system of claim 10, wherein the chip includes a voltage control oscillator, and the chip state parameters comprise a VCO sub-band parameter, or a V_tune parameter, wherein the VCO sub-band parameter indicates the range that the voltage control oscillator can support, and the V_tune parameter indicates the number of sub-bands that can be utilized.

14. The system of claim 10, wherein the chip has a plurality of operation states corresponding to different chip state parameters.

15. The system of claim 11, wherein the processor further determines a satellite searching range of the satellite positioning system according to the frequency variation.