THIN FILM TRANSISTOR SUBSTRATE

• US 20130063675A1
• Filed: 05/24/2011
• Published: 03/14/2013
• Est. Priority Date: 07/14/2010
• Status: Active Grant

• Current Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Original Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Inventors: Misaki, Katsunori
• Granted Patent: US 9,246,010 B2
• Time in Patent Office: Days
• US Class Current: 349/46
• CPC Class Codes: G02F 1/13458 Terminal pads
• CPC Class Codes: G02F 1/136227 Through-hole connection of the pixel electrode to the active element through an insulation layer
• CPC Class Codes: G02F 1/1368 in which the switching element is a three-electrode device G02F1/136277 takes precedence
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

In an oxide semiconductor layer, a degree of oxidation S1 of a portion located on the side of the gate insulating film, and a degree of oxidation S2 of surface layer portions located in connection regions with source and drain electrodes have a relation of S2<S1 within a range in which the oxide semiconductor layer has predetermined electric resistance, and a degree of oxidation S3 of a surface layer portion of the channel region is made higher than the degrees of oxidation S1, S2 of the other regions within the range in which the oxide semiconductor layer has the predetermined electric resistance, by annealing the oxide semiconductor layer in an oxygen-containing atmosphere after formation of the source electrode and the drain electrode.

Claims

1. :

A thin film transistor substrate, comprising;

a base substrate; and

a plurality of thin film transistors provided on the base substrate;

a protective insulating film provided so as to cover the thin film transistors; and

a plurality of pixel electrodes provided on the protective insulating film so as to correspond to the thin film transistors, respectively, wherein

each of the thin film transistors has a gate electrode, a gate insulating film provided so as to cover the gate electrode, a semiconductor layer comprised of an oxide semiconductor and provided on the gate insulating film so as to overlap the gate electrode, and a source electrode and a drain electrode which are provided on the gate insulating film so as to be separated from each other on the semiconductor layer and so that a part of the source electrode and a part of the drain electrode are connected to the semiconductor layer,

a channel region is formed in a portion of the semiconductor layer which is located between the source electrode and the drain electrode, and

in the semiconductor layer, a degree of oxidation S1 of a portion located on a side of the gate insulating film and a degree of oxidation S2 of surface layer portions located in connection regions with the source and drain electrodes have a relation of S2<

S1 within a range in which the semiconductor layer has predetermined electric resistance, and a degree of oxidation S3 of a surface layer portion of the channel region is made higher than the degrees of oxidation S1, S2 of the other regions within the range in which the oxide semiconductor layer has the predetermined electric resistance, by annealing the semiconductor layer in an oxygen-containing atmosphere after formation of the source electrode and the drain electrode.

2. :

The thin film transistor substrate of claim 1, wherein

the semiconductor layer has a stacked structure formed by stacking a plurality of layers.

3. :

The thin film transistor substrate of claim 2, wherein

the semiconductor layer has a two-layer structure formed by sequentially stacking a first semiconductor layer and a second semiconductor layer, and

in the semiconductor layer, the portion located on the side of the gate insulating film corresponds to the first semiconductor layer, the surface layer portions located in the connection regions with the source and drain electrodes correspond to portions of the second semiconductor layer which are located in the connection regions with the source and drain electrodes, and the surface layer portion of the channel region corresponds to a channel region portion of the second semiconductor layer.

4. :

The thin film transistor substrate of claim 2, wherein

the semiconductor layer has a three-layer structure formed by sequentially stacking a first semiconductor layer, a second semiconductor layer, and a third semiconductor layer, and

in the semiconductor layer, the portion located on the side of the gate insulating film corresponds to the first semiconductor layer, the surface layer portions located in the connection regions with the source and drain electrodes correspond to portions of the second semiconductor layer and the third semiconductor layer which are located in the connection regions with the source and drain electrodes, and the surface layer portion of the channel region corresponds to channel region portions of the second semiconductor layer and the third semiconductor layer.

5. :

The thin film transistor substrate of claim 1, wherein

the semiconductor layer is formed by a single layer, and in the semiconductor layer except the surface layer portion of the channel region, the degree of oxidation decreases from the side of the gate insulating film to a side of the source electrode and the drain electrode.

6. :

The thin film transistor substrate of claim 1, wherein

at least a surface layer portion of the gate insulating film is comprised of silicon oxide.

7. :

The thin film transistor substrate of claim 1, wherein

the protective insulating film is comprised of silicon oxide.

8. :

The thin film transistor substrate of claim 1, wherein

the semiconductor layer is comprised of an indium gallium zinc oxide-based oxide semiconductor.

9. :

A liquid crystal display device, comprising;

the thin film transistor substrate of claim 1;

a counter substrate placed so as to face the thin film transistor substrate; and

a liquid crystal layer provided between the thin film transistor substrate and the counter substrate.

10. :

A method for manufacturing the thin film transistor substrate of claim 1, comprising;

a first patterning step of forming the gate electrode by forming a conductive film on the base substrate and patterning the conductive film by using