BONDING METHOD FOR THREE-DIMENSIONAL INTEGRATED CIRCUIT AND THREE-DIMENSIONAL INTEGRATED CIRCUIT THEREOF
First Claim
1. A bonding method for a three-dimensional integrated circuit, applicable for manufacturing the three-dimensional integrated circuit, and the bonding method comprising the steps of:
- providing a first integrated circuit and a second integrated circuit each sequentially having a substrate, a film layer and a metal co-deposition layer, and each of the integrated circuits being formed by the steps of;
providing the substrate;
depositing the film layer on the substrate;
forming a pattern structure by exposing the film layer to a light source through a mask; and
co-depositing a first metal and a second metal onto the film layer to form a metal co-deposition layer; and
superimposing the first integrated circuit onto the second integrated circuit at a predetermined temperature, such that the co-deposition layers thereof are bonded with each other, and at least a portion of atoms of the first metal diffuse toward a bonding interface between the co-deposition layers and at least a portion of atoms of the second metal diffuse toward the respective film layers of each of the integrated circuits to form adhesion and barrier layers for the first metal.
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Accused Products
Abstract
The present invention discloses a bonding method for a three-dimensional integrated circuit and the three-dimensional integrated circuit thereof. The bonding method comprises the steps of: providing a substrate; depositing a film layer on the substrate; providing a light source to light onto the film layer to form a graphic structure; forming a metal co-deposition layer by a first metal and a second metal that are co-deposited on the film layer; providing a first integrated circuit having the substrate, the film layer and the metal co-deposition layer sequentially; providing a second integrated circuit that having the metal co-deposition layer, the film layer and the substrate sequentially; and the first integrated circuit is bonded with the second integrated circuit at a predetermined temperature to form a three-dimensional integrated circuit.
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Citations
15 Claims
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1. A bonding method for a three-dimensional integrated circuit, applicable for manufacturing the three-dimensional integrated circuit, and the bonding method comprising the steps of:
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providing a first integrated circuit and a second integrated circuit each sequentially having a substrate, a film layer and a metal co-deposition layer, and each of the integrated circuits being formed by the steps of; providing the substrate; depositing the film layer on the substrate; forming a pattern structure by exposing the film layer to a light source through a mask; and co-depositing a first metal and a second metal onto the film layer to form a metal co-deposition layer; and superimposing the first integrated circuit onto the second integrated circuit at a predetermined temperature, such that the co-deposition layers thereof are bonded with each other, and at least a portion of atoms of the first metal diffuse toward a bonding interface between the co-deposition layers and at least a portion of atoms of the second metal diffuse toward the respective film layers of each of the integrated circuits to form adhesion and barrier layers for the first metal. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A three-dimensional integrated circuit, comprising:
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a first integrated circuit, comprising; a first substrate; a first film layer, formed on the first substrate, having a first pattern structure formed thereon; and a first metal co-deposition layer disposed on the first film layer, having a first metal and a second metal deposited therewithin; and a second integrated circuit, comprising; a second substrate; a second film layer, formed on the second substrate, having a second pattern structure formed thereon; and a second metal co-deposition layer disposed on the second film layer, having the first metal and the second metal deposited therewithin; wherein the second integrated circuit is superimposed onto the first integrated circuit at a predetermined temperature, such that the first co-deposition layer and the second co-deposition layer are bonded with each other, and at least a portion of atoms of the first metal diffuse toward a bonding interface between the first co-deposition layer and the second co-deposition layer, and at least a portion of atoms of the second metal diffuse toward the respective film layers of each of the integrated circuits to form adhesion and barrier layers for the first metal. - View Dependent Claims (8, 9, 10, 11, 12)
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13. A three-dimensional integrated circuit, comprising:
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a first integrated circuit, having a first substrate, a first film layer and a first metal co-deposition layer sequentially; and a second integrated circuit, having a second metal co-deposition layer, a second film layer and a second substrate sequentially; wherein, the first metal co-deposition layer and the second metal co-deposition layer are bonded with each other at a predetermined temperature, and an adhesion and barrier layer is formed near the first film layer or the second film layer, and a boundary protection layer is formed near a surface of the first metal co-deposition layer or the second metal co-deposition layer. - View Dependent Claims (14, 15)
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Specification