PIXEL GUARD LINES AND MULTI-GATE LINE CONFIGURATION
First Claim
1. A display apparatus, comprising:
- an array of pixels, each pixel associated with a plurality of sub-pixels, each sub-pixel associated with a data line;
a display driver that sequentially applies voltage to the data lines in each pixel in accordance with a write sequence; and
a plurality of electrically conductive guard lines, each guard line positioned between two adjacent data lines.
1 Assignment
0 Petitions
Accused Products
Abstract
Data can be written to a sub-pixel by applying a voltage to the sub-pixel'"'"'s data line. A large change in voltage on a data line can affect the voltages on adjacent data lines due to capacitive coupling between data lines. The resulting change in voltage on these adjacent data lines can give rise to visual artifacts in the data lines'"'"' corresponding sub-pixels. Various embodiments of the present disclosure serve to prevent or reduce the appearance of these visual artifacts by inserting guard lines between data lines to reduce the mutual capacitance between data lines. In other embodiments, a pixel having multiple gate lines can be used to selectively turn on and turn off different sub-pixels which, in turn, can reduce or eliminate the appearance of visual artifacts.
-
Citations
23 Claims
-
1. A display apparatus, comprising:
-
an array of pixels, each pixel associated with a plurality of sub-pixels, each sub-pixel associated with a data line; a display driver that sequentially applies voltage to the data lines in each pixel in accordance with a write sequence; and a plurality of electrically conductive guard lines, each guard line positioned between two adjacent data lines. - View Dependent Claims (2, 3, 4, 5, 6)
-
-
7. A method for displaying an image on a display apparatus having an array of pixels, each pixel associated with a plurality of sub-pixels, each sub-pixel associated with a data line, the method comprising:
-
sequentially applying a voltage to the data lines in the pixel in accordance with a write sequence; and shielding electric field lines between two adjacent data lines with an electrically conductive guard line positioned between the adjacent data lines. - View Dependent Claims (8, 9, 10, 11)
-
-
12. A display apparatus, comprising:
-
an array of pixels, each pixel associated with one of a plurality of data lines, each pixel including a plurality of sub-pixels, each sub-pixel associated with a gate line and including a pixel TFT connected to the data line and to the gate line; a timing control module configured to generate a control signal, the control signal identifying a sub-pixel to be turned on and a plurality of sub-pixels to be turned off; and a gate driver configured to selectively apply a voltage to a gate line of the sub-pixel to be turned on based on the control signal, wherein a pixel TFT of the sub-pixel to be turned on is electrically connected to the data line, and wherein pixel TFTs of the plurality of sub-pixels to be turned off are electrically disconnected from the data line. - View Dependent Claims (13, 14, 15, 16, 17, 18, 19, 20)
-
-
21. A method for displaying an image on a display apparatus having an array of pixels, each pixel associated with one of a plurality of data lines, each pixel including a plurality of sub-pixels, each sub-pixel associated with a gate line and including a pixel TFT connected to the data line and to the gate line, the method comprising:
-
generating a control signal, the control signal identifying a sub-pixel to be turned on and a plurality of sub-pixels to be turned off; and selectively applying a voltage to a gate line of the sub-pixel to be turned on based on the control signal, wherein a pixel TFT of the sub-pixel to be turned on is electrically connected to the data line, and wherein pixel TFTs of the plurality of sub-pixels to be turned off are electrically disconnected from the data line. - View Dependent Claims (22, 23)
-
Specification