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IMPLEMENTING AND CHECKING ELECTRONIC CIRCUITS WITH FLEXIBLE RAMPTIME LIMITS AND TOOLS FOR PERFORMING THE SAME

  • US 20130080988A1
  • Filed: 11/19/2012
  • Published: 03/28/2013
  • Est. Priority Date: 07/14/2010
  • Status: Active Grant
First Claim
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1. A method of manufacturing an electronic circuit, comprising:

  • physically synthesizing a logical representation of an electronic circuit employing flexible ramptime limits;

    performing a timing test on said physically synthesized electronic circuit employing said flexible ramptime limits and a processor; and

    determining if there is a violation of said flexible ramptime limits.

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