MULTIPROCESSOR COMPUTING DEVICE

• US 20130081038A1
• Filed: 11/19/2012
• Published: 03/28/2013
• Est. Priority Date: 04/14/2009
• Status: Abandoned Application

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Laser, Marie R., Yu, Jessie, Dowf, Eli M.
• Application Number:
  US13/680,369
• Publication Number:
  US 20130081038A1
• Time in Patent Office: Days
• US Class Current: 718/102
• CPC Class Codes: G06F 1/3203 Power management, i.e. event-based initiation of a power-saving mode
• CPC Class Codes: G06F 1/329 by task scheduling
• CPC Class Codes: G06F 1/3293 by switching to a less power-consuming processor, e.g. sub-CPU
• CPC Class Codes: G06F 9/4893 taking into account power or heat criteria power management in computers in general G06F1/3203; thermal management in computers in general G06F1/206
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

A computing device includes a first processor configured to operate at a first speed and consume a first amount power and a second processor configured to operate at a second speed and consume a second amount of power. The first speed is greater than the second speed and the first amount of power is greater than the second amount of power. The computing device also includes a scheduler configured to assign processes to the first processor only if the processes utilize their entire timeslice.

Claims

1. A method of assigning processes to a first processor or a second processor in a multiprocessor computing device, the method comprising:

ascertaining that the first processor operates faster and consumes more power than the second processor;

determining whether a process is now or continues to operate as a spinlock process, a process with a sleeper bonus, or another type of process; and

assigning the process to the second processor in the event that the process is a spinlock process or a process with a sleeper bonus, otherwise, assigning the process to the first processor.

2. The method of claim 1, wherein determining includes monitoring the process each time it runs and storing the power consumption during the time that it runs.

3. The method of claim 1, wherein determining includes receiving an input from a compiler program.

4. The method of claim 1, wherein the first processor includes a general instruction set and the second processor includes a subset of the general instruction set.

5. The method of claim 1, wherein the second processor includes registers and atomic test and set instructions.