SYSTEM AND METHOD FOR DETECTION OF DIMENSIONS OF DISPLAY PANEL OR OTHER PATTERNED DEVICE

• US 20130082997A1
• Filed: 11/30/2011
• Published: 04/04/2013
• Est. Priority Date: 09/30/2011
• Status: Abandoned Application

• Current Assignee: Apple Inc.
• Original Assignee: Apple Inc.
• Inventors: Wurzel, Joshua Grey, Bi, Yafei, Yao, Wei H.
• Application Number:
  US13/308,042
• Publication Number:
  US 20130082997A1
• Time in Patent Office: Days
• US Class Current: 345/211
• CPC Class Codes: G02F 1/1309 Repairing; Testing
• CPC Class Codes: G06F 1/1601 Constructional details related to the housing of computer displays, e.g. of CRT monitors, of flat displays constructional details related to flat displays integrated in a portable computer, e.g. laptop, handheld computer G06F1/1637; constructional details related to television receivers H04N5/64
• CPC Class Codes: G06F 1/1637 Details related to the display arrangement, including those related to the mounting of the display in the housing
• CPC Class Codes: G06F 11/0742 in a data processing system embedded in a mobile device, e.g. mobile phones, handheld devices
• CPC Class Codes: G06F 11/0769 Readable error formats, e.g. cross-platform generic formats, human understandable formats
• CPC Class Codes: G06F 11/0772 Means for error signaling, e.g. using interrupts, exception flags, dedicated error registers
• CPC Class Codes: G06F 11/3044 where the computing system component is the mechanical casing of the computing system
• CPC Class Codes: G06F 11/3058 Monitoring arrangements for monitoring environmental properties or parameters of the computing system or of the computing system component, e.g. monitoring of power, currents, temperature, humidity, position, vibrations thermal management in cooling arrangements of a computing system G06F1/206
• CPC Class Codes: G06F 11/327 Alarm or error message display
• CPC Class Codes: G06F 2200/1612 Flat panel monitor
• CPC Class Codes: G09G 2300/0426 Layout of electrodes and connections
• CPC Class Codes: G09G 2330/12 Test circuits or failure detection circuits included in a display system, as permanent part thereof
• CPC Class Codes: G09G 3/20 for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
• CPC Class Codes: Y10T 29/49004 including measuring or testing of device or component part

Abstract

Systems and methods for evaluating whether a display panel is of specified dimensions are provided. Such a system, for example, may include resistance detection circuitry that detects a resistance of at least one resistive trace disposed around a display panel or other patterned device. Data processing circuitry may determine, based at least in part on the detected resistance, whether the display panel is of a specified size or whether the display panel has specified dimensions, or a combination thereof. Additionally or alternatively, the system may determine whether a touch sensor panel (e.g., a single-sided indium tin oxide (SITO) or double-sided indium tin oxide (DITO) touch sensor panel), a flexible printed circuit (FPC), a printed circuit board (PCB), or any other suitable patterned device, is of a specified size or has specified dimensions.

Claims

1. A system comprising:

resistance detection circuitry configured to detect a resistance of at least one resistive trace disposed around a display panel; and

data processing circuitry configured to determine, based at least in part on the detected resistance, whether the display panel is of a specified size or whether the display panel has specified dimensions, or a combination thereof.

2. The system of claim 1, wherein the resistance detection circuitry comprises at least two probes configured to detect the resistance of the at least one resistive trace.

3. The system of claim 1, wherein the resistance detection circuitry comprises circuitry disposed on the display panel, wherein the circuitry disposed on the display panel is configured to output a value indicative of the detected resistance to the data processing circuitry.

4. The system of claim 1, wherein the at least one resistive trace disposed around the display panel comprises only one resistive trace configured to vary in resistance depending on its width.

5. The system of claim 1, wherein the at least one resistive trace disposed around the display panel comprises a plurality of resistive traces, wherein the plurality of resistive traces is configured to vary in resistance depending on the number of traces of the plurality of resistive traces.

6. A method of manufacturing a display panel comprising:

patterning at least one resistive trace on a display panel at least partially in a dead zone of the display panel that is expected to be removed when the display panel is ground to specified dimensions;

grinding the display panel in an effort to achieve the specified dimensions;

measuring a resistance of the at least one resistive trace on the display panel; and

determining whether the display panel has been ground to the specified dimensions based at least in part on the resistance of the at least one resistive trace on the display panel.

7. The method of claim 6, wherein the at least one resistive trace is patterned when an element of an active area of the display panel is patterned.

8. The method of claim 6, wherein determining whether the display panel has been ground to the specified dimensions comprises determining whether the resistance is less than a lower tolerance which indicates the display panel size is too large.

9. The method of claim 8, comprising regrinding the display panel after the resistance is determined to be less than the lower tolerance.

10. The method of claim 6, wherein determining whether the display panel has been ground to the specified dimensions comprises determining whether the resistance is greater than an upper tolerance which indicates the display panel size is too small.

11. The method of claim 10, comprising rejecting the display panel when the resistance is determined to be greater than the upper tolerance.

12. The method of claim 6, wherein determining that the display panel has been ground to the specified dimensions comprises determining that the resistance is greater than or equal to a lower tolerance and less than or equal to an upper tolerance.

13. A display panel comprising:

an active display area configured to be visible when the display panel is installed in an electronic device;

an outermost area of the display panel that has been at least partially cut or polished, or both, wherein the outermost area comprises at least one resistive trace; and

a peripheral circuitry area disposed between the active display area and the outermost area, wherein the peripheral circuitry area comprises resistance detection circuitry configured to indicate a relationship between resistances of segments of the at least one resistive trace, wherein the relationship is indicative of whether the display panel has been cut or polished, or cut and polished, to specified dimensions.

14. The display panel of claim 13, wherein the resistance detection circuitry comprises an internal resistance and connections to the segments of the at least one resistive trace, wherein the segments of the at least one resistive trace generally correspond to edges of the display panel, and wherein the internal resistance and the segments of the at least one resistive trace form a Wheatstone bridge circuit.

15. The display panel of claim 14, wherein the resistance detection circuitry comprises a comparator circuit configured to compare output voltages of the Wheatstone bridge circuit and provide a difference between the output voltages of the Wheatstone bridge circuit, wherein the difference indicates the relationship between the resistances of the segments of the at least one resistive trace.

16. The display panel of claim 14, wherein the resistance detection circuitry is configured to determine digital values associated with output voltages of the Wheatstone bridge circuit using comparator circuits configured to compare the output voltages of the Wheatstone bridge circuit to digital values that have been converted to analog values, wherein the digital values are approximately equal to the output voltages of the Wheatstone bridge circuit when the outputs of the comparator circuits is substantially zero.

17. The display panel of claim 14, wherein the segments of the at least one resistive trace are configured to be approximately equal unless the display panel has not been cut or has not been ground, or has neither been cut nor ground, to specified dimensions, and wherein the Wheatstone bridge circuit is configured to output voltages of approximately equal value on both sides of the internal resistance of the Wheatstone bridge when the segments of the at least one resistive trace are approximately equal.

18. An electronic display comprising:

at least one resistive trace having a first segment with a first resistance disposed near a first edge of a display panel of the electronic display, a second segment with a second resistance disposed near a second edge of the display panel of the electronic display, a third segment with a third resistance disposed near a third edge of the display panel of the electronic display, and a fourth segment with a fourth resistance disposed near a fourth edge of the display panel of the electronic display; and

resistance detection circuitry configured to detect sufficient information regarding the first segment, second segment, third segment, and fourth segment to enable the determination of the first resistance, second resistance, third resistance, and fourth resistance.

19. The display panel of claim 18, wherein the resistance detection circuitry is configured to form a circuit with a first node, a second node, a third node, and a fourth node, wherein the first resistance is disposed between the first node and the second node, the third resistance is disposed between the second node and the third node, the second resistance is disposed between the third node and the fourth node, the fourth resistance is disposed between the first node and the fourth node, and an element having at least two variable resistances disposed between the second node and the fourth node, such that applying power between the first node and the third node and monitoring voltages that result at the second node and the third node when two different resistances are applied between the second node and the third node provides sufficient information to enable the determination of the first resistance, second resistance, third resistance, and fourth resistance.

20. The display panel of claim 19, wherein the element having at least two variable resistances comprises a switch configured to have a substantially infinite resistance when open and a substantially infinitesimal resistance when closed.

21. The electronic display of claim 18, wherein at least a portion of the resistance detection circuitry is disposed on the display panel of the electronic display.

22. An electronic device comprising:

a processor configured to provide image data; and

an electronic display configured to display the image data on an active display area of a display panel, wherein the display panel comprises at least one resistive trace that at least partially traverses an outer portion of the display panel, wherein the at least one resistive trace has a resistance that indicates the display panel has been ground to a size within a specified tolerance.

23. The electronic device of claim 22, wherein the at least one resistive trace comprises a plurality of resistive traces that remained after the display panel was ground down and other resistive traces ground away, wherein the number of the plurality of resistive traces that remain comprise the resistance that indicates the display panel has been ground to the size within the specified tolerance.

24. The electronic device of claim 22, wherein the at least one resistive trace comprises a portion of a single original resistive trace that remained after the display panel was ground down, wherein the portion of the single original resistive trace comprises the resistance that indicates the display panel has been ground to the size within the specified tolerance.

25. The electronic device of claim 22, wherein the specified tolerance is less than approximately 150 μ

m.

26. A method of manufacturing a patterned device comprising:

patterning at least one resistive trace on the patterned device on a location that is expected to be removed when the patterned device is cut to specified dimensions;

cutting the patterned device;

measuring a resistance of the at least one resistive trace on the patterned device; and

determining whether the patterned device has been cut to the specified dimensions based at least in part on the resistance of the at least one resistive trace on the patterned device.

27. The method of claim 26, wherein the patterned device comprises a display panel, a touch sensor panel, a flexible printed circuit, or a printed circuit board, or a combination thereof.

28. The method of claim 26, wherein the patterned device comprises a flexible printed circuit and wherein the flexible printed circuit is cut at least in part by die-punching.

29. The method of claim 26, wherein the patterned device comprises a printed circuit board and wherein the printed circuit board is cut at least in part by drilling out the printed circuit board.