VECTOR WIDTH-AWARE SYNCHRONIZATION-ELISION FOR VECTOR PROCESSORS

• US 20130086566A1
• Filed: 09/29/2011
• Published: 04/04/2013
• Est. Priority Date: 09/29/2011
• Status: Active Grant

• Current Assignee: Advanced Micro Devices, Inc.
• Original Assignee: Advanced Micro Devices, Inc.
• Inventors: Gaster, Benedict R., Howes, Lee W.
• Granted Patent: US 8,966,461 B2
• Time in Patent Office: Days
• US Class Current: 717/148
• CPC Class Codes: G06F 8/443 Optimisation
• CPC Class Codes: G06F 9/45525 Optimisation or modification within the same instruction set architecture, e.g. HP Dynamo

Abstract

A medium, method, and apparatus are disclosed for eliding superfluous function invocations in a vector-processing environment. A compiler receives program code comprising a width-contingent invocation of a function. The compiler creates a width-specific executable version of the program code by determining a vector width of a target computer system and omitting the function from the width-specific executable if the vector width meets one or more criteria. For example, the compiler may omit the function call if the vector width is greater than a minimum size.

Claims

1. A computer-readable storage medium storing program instructions executable by a computer to implement a compiler configured to:

create a width-specific executable version of program code, wherein producing the width-specific executable version comprises;

determining a vector width of a target computer system; and

in response to determining that the vector width meets one or more criteria, omitting a function from the width-specific executable version.

2. The medium of claim 1, wherein the function is a synchronization function.

3. The medium of claim 1, wherein the function corresponds to a barrier operation.

4. The medium of claim 1, wherein the one or more criteria include a minimum vector-width for including the function in the width-specific executable.

5. The medium of claim 4, wherein the width-contingent invocation specifies the minimum vector width.

6. The medium of claim 1, wherein the compiler is a just-in-time compiler configured to create the width-specific executable version at runtime.

7. The medium of claim 1, wherein the compiler is configured to determine the vector width by querying a programmatic interface exposed by a runtime environment.

8. The medium of claim 1, wherein the compiler is configured to determine the vector width by receiving an indication of the width through configuration information.

9. A computer-implemented method of compiling program code, the method comprising:

creating a width-specific executable version of the program code, wherein producing the width-specific executable version comprises;

determining a vector width of a target computer system; and

in response to determining that the vector width is greater than a threshold indicated by the width-contingent invocation, omitting a function from the width-specific executable version.

10. The method of claim 9, wherein the function is configured to perform a synchronization function.

11. The method of claim 9, wherein the function corresponds to a barrier operation.

12. The method of claim 9, wherein the compiler is a just-in-time compiler and creating the width-specific executable version is performed at program runtime.

13. The method of claim 9, wherein the compiler is configured to determine the vector width by querying a programmatic interface exposed by a runtime environment.

14. The method of claim 9, wherein the compiler determines the vector width by receiving an indication of the width through configuration information.

15. An apparatus comprising:

a memory storing a computer program;

a vector processor configured to elide a function call in the computer program in response to determining that the function call is superfluous, wherein determining that the function call is superfluous is based on a vector width of the vector processor.

16. The apparatus of claim 15, wherein the function is configured to perform a synchronization option.

17. The apparatus of claim 15, wherein the function corresponds to a barrier operation.

18. The apparatus of claim 15, wherein determining that the function call is superfluous comprises determining that the vector width is greater than a minimum vector width.

19. The apparatus of claim 18, wherein the minimum vector width is indicated by the function invocation.

20. The apparatus of claim 15, wherein the vector processor comprises hardware mechanisms configured to elide the function call.