SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
First Claim
1. A semiconductor device comprising:
- a source electrode layer;
a drain electrode layer;
an oxide semiconductor layer in contact with the source electrode layer on one of side surfaces in a channel length direction and in contact with the drain electrode layer on the other of the side surfaces in the channel length direction;
a gate insulating layer in contact with an entire upper surface of the oxide semiconductor layer, at least a part of an upper surface of the source electrode layer, and at least a part of an upper surface of the drain electrode layer;
a gate electrode layer over the oxide semiconductor layer with the gate insulating layer therebetween;
a first sidewall layer having conductivity in contact with one of side surfaces of the gate electrode layer in the channel length direction; and
a second sidewall layer having conductivity in contact with the other of the side surfaces of the gate electrode layer in the channel length direction,wherein at least part of the first sidewall layer is provided over the source electrode layer with the gate insulating layer therebetween, andwherein at least part of the second sidewall layer is provided over the drain electrode layer with the gate insulating layer therebetween.
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Accused Products
Abstract
A miniaturized transistor having favorable electric characteristics is provided. The transistor includes an oxide semiconductor layer which is in contact with a source electrode layer on one of side surfaces in a channel length direction and in contact with a drain electrode layer on the other of the side surfaces in the channel length direction. With this structure, an electric field between the source electrode layer and the drain electrode layer is relaxed and a short-channel effect is suppressed. Further, a sidewall layer having conductivity is provided on a side surface of a gate electrode layer in the channel length direction, so that the sidewall layer having conductivity overlaps with the source electrode layer or the drain electrode layer with a gate insulating layer provided therebetween, which enables the transistor to substantially have an Lov region.
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Citations
7 Claims
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1. A semiconductor device comprising:
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a source electrode layer; a drain electrode layer; an oxide semiconductor layer in contact with the source electrode layer on one of side surfaces in a channel length direction and in contact with the drain electrode layer on the other of the side surfaces in the channel length direction; a gate insulating layer in contact with an entire upper surface of the oxide semiconductor layer, at least a part of an upper surface of the source electrode layer, and at least a part of an upper surface of the drain electrode layer; a gate electrode layer over the oxide semiconductor layer with the gate insulating layer therebetween; a first sidewall layer having conductivity in contact with one of side surfaces of the gate electrode layer in the channel length direction; and a second sidewall layer having conductivity in contact with the other of the side surfaces of the gate electrode layer in the channel length direction, wherein at least part of the first sidewall layer is provided over the source electrode layer with the gate insulating layer therebetween, and wherein at least part of the second sidewall layer is provided over the drain electrode layer with the gate insulating layer therebetween. - View Dependent Claims (2, 3)
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4. A semiconductor device comprising:
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a source electrode layer; a drain electrode layer; an oxide semiconductor layer including a first impurity region, a second impurity region, and a channel formation region sandwiched between the first impurity region and the second impurity region and being in contact with the source electrode layer on a side surface of the first impurity region in a channel length direction and in contact with the drain electrode layer on a side surface of the second impurity region in the channel length direction; a gate insulating layer in contact with an entire upper surface of the oxide semiconductor layer, at least a part of an upper surface of the source electrode layer, and at least a part of an upper surface of the drain electrode layer; a gate electrode layer over the channel formation region with the gate insulating layer therebetween; a first sidewall layer having conductivity in contact with one of side surfaces of the gate electrode layer in the channel length direction; and a second sidewall layer having conductivity in contact with the other of the side surfaces of the gate electrode layer in the channel length direction, wherein at least part of the first sidewall layer is provided over the source electrode layer with the gate insulating layer therebetween, and wherein at least part of the second sidewall layer is provided over the drain electrode layer with the gate insulating layer therebetween. - View Dependent Claims (5, 6)
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7. A method for manufacturing a semiconductor device, comprising the steps of:
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forming an island-shaped oxide semiconductor layer; forming a conductive film covering the island-shaped oxide semiconductor layer; removing a region of the conductive film which overlaps with the island-shaped oxide semiconductor layer with a chemical mechanical polishing method to provide a conductive film having an opening; processing the conductive film having the opening to form a source electrode layer and a drain electrode layer; forming a gate insulating layer over the island-shaped oxide semiconductor layer, the source electrode layer, and the drain electrode layer; forming a gate electrode layer overlapping with the island-shaped oxide semiconductor layer with the gate insulating layer therebetween; and forming a first sidewall layer or a second sidewall layer having conductivity in a region in contact with a side surface of the gate electrode layer and overlapping with the source electrode layer or the drain electrode layer.
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Specification