MULTILEVEL INVERTER

• US 20130088901A1
• Filed: 03/29/2011
• Published: 04/11/2013
• Est. Priority Date: 03/31/2010
• Status: Abandoned Application

• Current Assignee: Ce+T
• Original Assignee: Ce+T
• Inventors: Bleus, Paul, Joannes, Thierry, Milstein, Franois
• Application Number:
  US13/637,802
• Publication Number:
  US 20130088901A1
• Time in Patent Office: Days
• US Class Current: 363/71
• CPC Class Codes: H02M 1/0048 Circuits or arrangements for reducing losses using snubbers H02M1/34
• CPC Class Codes: H02M 7/48 using discharge tubes with control electrode or semiconductor devices with control electrode
• CPC Class Codes: H02M 7/487 Neutral point clamped inverters
• CPC Class Codes: H02M 7/515 using semiconductor devices only
• CPC Class Codes: H02M 7/537 using semiconductor devices only, e.g. single switched pulse inverters
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

Multilevel DC to AC power converter has three DC inputs (IN1, IN2, IN3) for receiving, respectively, three DC voltages (V1,V2,V3), wherein V1>V2>V3, one AC output (OUT1) for delivering an AC voltage (Va), a set of at least six switching means (T1,T2,T3,T4,T5,T6) arranged in a symmetric pyramidal fashion, and switch control means for controlling an ON/OFF state of each of the six switching means. The switch control means is configured such that the top two switching means (T5,T6) are switched ON and OFF in a complementary fashion and, exclusively, at a fundamental frequency (Fa) of the AC voltage to be delivered at the AC output (OUT1), whereas at least some of the other four switching means (T1,T2,T3,T4) are switched ON and OFF at higher frequencies. The top two switching means (T5,T6) are hence subject to lower switching losses, thereby increasing the overall efficiency of the converter.

Claims

1. An inverter module comprising;

first, second and third DC inputs for receiving, respectively, a first, a second and a third DC voltages voltage, wherein the first DC voltage is greater than the second DC voltage which is greater than the third DC voltage;

a first switching means, a second switching means, a third switching means and a fourth switching means, sequentially connected in series between the first and the third DC inputs, the second DC input being connected to a first series connection between the second and third switching means;

a fifth switching means and a sixth switching means, sequentially, connected in series between (i) a second series connection between the first and second switching means and (ii) a third series connection between the third and fourth switching means;

an AC output connected to a fourth series connection between the fifth and sixth switching means, for delivering an AC voltage with regard to the second DC input; and

switch control means for controlling an ON/OFF state of each of the first, second, third, fourth, fifth and sixth switching means,

wherein

the switch control means is configured such that;

for outputting a positive alternation at the AC output, the third, fourth and sixth switching means are all switched OFF, the fifth switching means is switched ON, and the first and second switching means are switched ON and OFF several times in a complementary fashion; and

for outputting a negative alternation at the AC output, the first, second and fifth switching means are all switched OFF, the sixth switching means is switched ON, and the third and fourth switching means are switched ON and OFF several times in a complementary fashion.

2. The inverter module according to claim 1, wherein the first, second, third and fourth switching means are semiconductor devices having first specifications and in that the fifth and sixth switching means are semiconductor devices having second specifications, wherein the second specifications are different specifications than the first specifications.

3. The inverter module according to claim 2, wherein each of the fifth and sixth switching means presents an intrinsic conduction loss that is lower than an intrinsic conduction loss of each of the first, second, third and fourth switching means.

4. The inverter module according to claim 3, wherein the fifth and sixth switching means are thyristor-type semiconductors, and in that the first, second, third and fourth switching means are transistor-type semiconductors.

5. An inverter comprising at least two inverter modules according to claim 1.

6. A three-phase inverter comprising three legs, each leg comprising at least one inverter module according to claim 1.