DEVICE AND METHOD FOR DETECTING A SHORT-CIRCUIT DURING A START-UP ROUTINE

• US 20130093326A1
• Filed: 10/11/2012
• Published: 04/18/2013
• Est. Priority Date: 10/14/2011
• Status: Active Grant

• Current Assignee: STMicroelectronics Shenzhen R&D Co Ltd (STMicroelectronics NV)
• Original Assignee: STMicroelectronics Shenzhen R&D Co Ltd (STMicroelectronics NV)
• Inventors: ZHANG, HaiBo, LI, Jin
• Granted Patent: US 9,058,766 B2
• Time in Patent Office: Days
• US Class Current: 315/121
• CPC Class Codes: G09G 2330/02 Details of power systems and of start or stop of display operation
• CPC Class Codes: G09G 2330/08 Fault-tolerant or redundant circuits, or circuits in which repair of defects is prepared
• CPC Class Codes: G09G 2330/10 Dealing with defective pixels
• CPC Class Codes: G09G 3/20 for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters

Abstract

A device and method for detecting a short circuit in an electrical component during a start-up routine. In an embodiment, a device may have a problematic display having a short circuit that may result in damage to other components of the device if the device were allowed to fully startup during a normal start-up routine. Thus, power supplied to the panel may be initiated in stages so as to monitor any current that may be flowing through the panel, which in turn, may be indicative of a short circuit in the panel. If enough “leakage” current is detected through the panel during this staged startup routine, then a short-circuit detection circuit may interrupt the startup routine and lock out the operation of the device until the detected short circuit in the panel can be addressed.

Claims

1. A device, comprising:

a display;

a power supply circuit operable to provide power to the display; and

a detection circuit coupled to the power supply circuit, the detection circuit configured to detect a failure in the display and configured to interrupt the power supplied to the display in response to the detection.

2. The device of claim 1, wherein the display further comprises an active matrix organic light emitting diode display.

3. The device of claim 1, wherein the power supply circuit comprises:

a boost converter including a plurality of switches configured to generate a first output voltage derived from an input voltage; and

an inverting converter including a plurality of switches configured to generate a second output voltage having an opposite polarity as the first output voltage and derived from the input voltage.

4. The device of claim 1, wherein the detection circuit further comprises:

a switch configured to couple an output node of the power supply circuit to a reference node;

a comparator configured to compare a voltage on the output node of the power supply to a reference voltage; and

an interruption circuit configured to interrupt the power supply if the voltage on the output node exceeds the reference voltage.

5. The device of claim 1, further comprising one of the group including:

personal data assistant, mobile computing device, smart phone, laptop computer, and a monitor for a desktop computer.

6. The device of claim 1, further comprising a battery coupled to the power supply circuit.

7. The device of claim 1, further comprising a processor coupled to the power supply circuit and coupled to the display, the processor configured to control the power supply circuit and to control the display.

8. An integrated circuit, comprising:

a power supply circuit configured to produce a first voltage on a first node during a first phase of a startup routine and a second voltage on a second node during a second phase of a startup routine; and

a detection circuit coupled to the second node and configured to monitor the voltage on the second node during the first phase and to interrupt operation of the power supply circuit if the voltage on the second node exceeds a threshold voltage during the first phase.

9. The integrated circuit of claim 8 wherein the power circuit further comprises a dual DC-DC converter configured to receive an input voltage of approximately 4.6 volts and to produce a voltage of approximately 7.0 volts on the first node after the first phase and to produce a voltage of approximately −

7.0 volts on the second node after the second phase.

10. The integrated circuit of claim 8 wherein threshold voltage comprises a voltage of approximately 300 mV.

11. The integrated circuit of claim 8 further comprising a switch operable to decouple the detection circuit from the second node after the first phase.

12. A power supply circuit, comprising:

a dual DC-DC converter configured to produce a first voltage on a first node and a second voltage on a second node, the two voltage operable to be coupled to a display; and

a detection circuit configured to monitor a current between the first node and the second node and to interrupt operation of the power supply circuit if the current exceeds a threshold current.

13. The power supply circuit of claim 12 comprising a single integrated circuit die.

14. The power supply circuit of claim 12 comprising multiple integrated circuit dies.

15. A method, comprising:

detecting a failure in a component of an electronic device during a startup sequence; and

interrupting a power startup sequence in response to the detection.

16. The method of claim 15, wherein the detecting the failure further comprises detecting presence of one or more compromised pixels in an array of pixels.

17. The method of claim 16, wherein the detecting presence of one or more compromised pixels further comprises detecting more than a threshold of compromised pixels.

18. The method of claim 15, wherein the interrupting further comprises:

setting a startup interrupt detection bit in response to the detection; and

causing a processor to stop the startup sequence.

19. The method of claim 15, further comprising:

generating a first voltage on a first node coupled to the component during a first phase of the startup sequence; and

detecting a voltage on a second node coupled to the component during the first phase.

20. The method of claim 19, further comprising generating a second voltage on the second node during a second phase of the startup sequence if a voltage is not detected on the second node during the first phase.

21. A method for a power startup routine, comprising:

enabling a power supply circuit having first and second supply nodes coupled to an electrical component;

generating a first ramped voltage signal on a first power supply node during a first phase of the startup routine;

enabling a detection circuit configured to sense a current through the electrical component during the first phase;

in response to detecting the current;

disabling the generation of the first ramped voltage signal; and

in response to not detecting a current;

disabling the detection circuit; and

generating a second ramped voltage signal on a second power supply node during a second phase of the startup routine.

22. The method of claim 21, wherein the generating the first ramped voltage signal further comprises generating the first ramped voltage signal with a slope dependent upon a first capacitor coupled to the first power supply node and the generating the second ramped voltage signal further comprises generating the second ramped voltage signal with a slope dependent upon a second capacitor coupled to the first power supply node.

23. The method of claim 22, wherein the size of the second capacitor is related to a short circuit resistance of the electrical component.

24. The method of claim 21, further comprising locking in the disabling of the first ramped voltage signal such that startup routine may not be started again until unlocked.

25. A method, comprising:

monitoring a short-circuit detection current during a startup phase of an electronic device; and

interrupting a power startup sequence in response to the detecting that the short-circuit detection current exceeds a predetermined threshold.