MANUFACTURING METHOD OF SOLID STATE LIGHT EMITTING ELEMENT

• US 20130095591A1
• Filed: 04/10/2012
• Published: 04/18/2013
• Est. Priority Date: 10/18/2011
• Status: Active Grant

• Current Assignee: Lextar Electronics Corporation
• Original Assignee: Lextar Electronics Corporation
• Inventors: Yu, Chang-Chin, Lin, Mong-Ea
• Granted Patent: US 8,574,935 B2
• Time in Patent Office: Days
• US Class Current: 438/46
• CPC Class Codes: H01L 21/0242 Crystalline insulating materials
• CPC Class Codes: H01L 21/02458 Nitrides
• CPC Class Codes: H01L 21/0254 Nitrides
• CPC Class Codes: H01L 21/02642 Mask materials other than SiO2 or SiN
• CPC Class Codes: H01L 21/02664 Aftertreatments planarisation in general H01L21/304
• CPC Class Codes: H01L 21/30612 Etching of AIIIBV compounds
• CPC Class Codes: H01L 33/007 comprising nitride compounds
• CPC Class Codes: H01L 33/0093 Wafer bonding; Removal of the growth substrate

Abstract

A manufacturing method of a solid state light emitting element is provided. A plurality of protrusion structures separated to each other are formed on a first substrate. A buffer layer is formed on the protrusion structures and fills the gaps between protrusion structures. An epitaxial growth layer is formed on the buffer layer to form a first semiconductor stacking structure. The first semiconductor stacking structure is inverted to a second substrate, so that the first semiconductor epitaxial layer and the second substrate are connected to form a second semiconductor stacking structure. The buffer layer is etched by a first etchant solution to form a third semiconductor stacking structure. A second etchant solution is used to permeate through the gaps between the protrusion structures, so that the protrusion structures are etched completely. The first substrate is removed from the third semiconductor stacking structure to form a fourth semiconductor stacking structure.

Claims

1. A manufacturing method of a solid state light emitting element, the method comprising:

providing a first substrate;

forming a plurality of protrusion structures separated to each other on the first substrate;

forming a buffer layer on the protrusion structures, wherein the buffer layer fills the gaps between the protrusion structures;

forming an epitaxial growth layer on the buffer layer to form a first semiconductor stacking structure, wherein the epitaxial growth layer is constituted by a second type semiconductor epitaxial layer, an active layer and a first type semiconductor epitaxial layer in sequence;

inverting the first semiconductor stacking structure to a second substrate, so that the first semiconductor epitaxial layer and the second substrate are connected to form a second semiconductor stacking structure;

processing the second semiconductor stacking structure by a first etchant solution, which etches the buffer layer completely to form a third semiconductor stacking structure;

processing the third semiconductor stacking structure by a second etchant solution, which permeates through the gaps between the protrusion structures located between the first substrate and the second type semiconductor epitaxial layer to etch the protrusion structures completely; and

removing the first substrate from the third semiconductor stacking structure to form a fourth semiconductor stacking structure constituted by the second substrate and the epitaxial growth layer disposed thereon.

2. The method according to claim 1, wherein before using the first etchant solution for etching the buffer layer, the method further comprises forming a protection layer covering the surfaces of the epitaxial growth layer and the second substrate.

3. The method according to claim 2, wherein after removing the first substrate, the method further comprises removing the protection layer.

4. The method according to claim 2, wherein the protection layer is formed by an anti-acid/alkali-base macromolecular photoresist material or an inorganic material.

5. The method according to claim 1, wherein the forming method of the protrusion structures comprises lithography and etching.

6. The method according to claim 1, wherein the protrusion structures are nano-pillar structures formed by metal oxides, and the height of each nano-pillar structure ranges between 10˜

10,000 nano-meters.

7. The method according to claim 6, wherein the metal oxides comprises nickel oxide.

8. The method according to claim 1, wherein the distance between apexes of two neighboring protrusion structures ranges between 10˜

1,000 nano-meters.

9. The method according to claim 1, wherein the first etchant solution used for etching the buffer layer is an alkaline etchant solution.

10. The method according to claim 9, wherein the alkaline etchant solution comprises potassium hydroxide (KOH) or sodium hydroxide (NaOH).

11. The method according to claim 1, wherein the second etchant solution used for etching the protrusion structures is an acid etchant solution.

12. The method according to claim 11, wherein the acid etchant solution comprises nitric acid (HNO₃), acetic acid, hydrochloric acid or hydrofluoric acid (HF) or a combination thereof.

13. The method according to claim 1, wherein the second substrate is a conductive substrate.

14. The method according to claim 1, wherein the buffer layer is formed by nitrides.

15. The method according to claim 14, wherein the buffer layer is selected by a group composed of gallium nitride (GaN), aluminum nitride (AlN) and aluminum gallium nitride (AlGaN).

16. The method according to claim 1, wherein the epitaxial growth layer is formed by nitrides contained the elements of group IIIA of the periodic table.

17. The method according to claim 1, wherein the first type semiconductor epitaxial layer is a P-type semiconductor layer, and the second type semiconductor epitaxial layer is an N-type semiconductor layer.

18. The method according to claim 1, wherein the first type semiconductor epitaxial layer is an N-type semiconductor layer, and the second type semiconductor epitaxial layer is a P-type semiconductor layer.

19. The method according to claim 1, wherein the active layer comprises a plurality of quantum well layers.

20. The method according to claim 1, further comprising forming an nitride epitaxial layer not doped with impurities between the buffer layer and the second type semiconductor epitaxial layer, wherein the nitride epitaxial layer not doped with impurities is formed by nitrides contained the elements of group IIIA of the periodic table.