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System and Method for High-Performance, Low-Power Data Center Interconnect Fabric

  • US 20130097448A1
  • Filed: 12/05/2012
  • Published: 04/18/2013
  • Est. Priority Date: 10/30/2009
  • Status: Active Grant
First Claim
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1. A system on a chip, comprising:

  • one or more processing cores;

    a switching fabric; and

    one or more management processors coupled to the fabric switch and to each one of the one or more processing cores, wherein the management processor causes a communication request directed to a first one of the one or more processing cores to be held in the switching fabric while the first one of the one or more processing cores is in an inactive state and causes the communication request to be received by the first one of the one or more processing cores in response to the first one of the one or more processing cores being transitioned from the inactive state to an active state.

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