METHOD FOR MANUFACTURING INSULATED-GATE TRANSISTORS
First Claim
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1. A method for manufacturing MOS transistors, comprising:
- forming an insulating area in a semiconductor substrate, the forming including;
forming a trench in a surface of the semiconductor substrate;
forming a bonding layer on walls of the trench; and
passivating at least a portion of the bonding layer; and
forming an insulated gate, on the surface of the substrate and in contact with the insulating area, said gate including a stack of a insulating first layer having a high dielectric constant and a second layer including atoms capable of diffusing towards the first layer.
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Abstract
A method for defining an insulating area in a semiconductor substrate, including a step of forming of a bonding layer on the walls and the bottom of a trench defined in the substrate. A step of passivation of the apparent surface of said bonding layer, at least close to the surface of said semiconductor substrate.
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Citations
20 Claims
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1. A method for manufacturing MOS transistors, comprising:
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forming an insulating area in a semiconductor substrate, the forming including; forming a trench in a surface of the semiconductor substrate; forming a bonding layer on walls of the trench; and passivating at least a portion of the bonding layer; and forming an insulated gate, on the surface of the substrate and in contact with the insulating area, said gate including a stack of a insulating first layer having a high dielectric constant and a second layer including atoms capable of diffusing towards the first layer. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A method, comprising:
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forming a trench in a substrate of semiconductor material; forming a bonding layer on walls of the trench; positioning insulating material in the trench; forming a transistor gate on a face of the substrate and extending at least as far as an edge of the trench, including; depositing a first gate layer on the face of the substrate, depositing a second gate layer on the first gate layer, and diffusing atoms from the second gate layer to the first gate layer; and while diffusing the atoms, blocking parasitic diffusion agents that form on surfaces of the bonding layer from affecting the diffusing. - View Dependent Claims (8, 9, 10, 11)
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12. A device, comprising:
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a substrate of semiconductor material; an insulating trench extending into the substrate from a face of the substrate; insulating material positioned in the insulating trench; a bonding layer positioned on walls of the trench and between the walls of the trench and the insulating material, a portion of the bonding layer being passivated; a MOS device including a channel region positioned in the substrate adjacent to the trench; and an insulated gate positioned on the face of the substrate, over the channel region, and at least on an edge of the trench. - View Dependent Claims (13, 14, 15)
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16. A device, comprising:
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a substrate of semiconductor material; an insulating trench extending into the substrate from a face of the substrate; insulating material positioned in the insulating trench; a bonding layer positioned on walls of the trench between the walls of the trench and the insulating material; a MOS device including a channel region positioned in the substrate adjacent to the trench; an insulated gate positioned on the face of the substrate over the channel region and extending at least to an edge of the trench, the insulated gate including a diffusion material layer positioned on the substrate and a dielectric layer positioned on the substrate between the substrate and the diffusion material layer, with atoms of the diffusion material layer positioned on a side of the dielectric layer opposite the diffusion material layer; and means for blocking parasitic diffusion agents that form on surfaces of the bonding layer from affecting diffusion of the atoms through the dielectric layer. - View Dependent Claims (17, 18, 19, 20)
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Specification