GYROSCOPE WITH PHASE AND DUTY-CYCLE LOCKED LOOP
First Claim
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1. A gyroscope system comprising:
- a MEMS gyroscope including a drive-sense terminal and a sense terminal;
a drive amplifier being coupled to the drive-sense terminal;
a sense amplifier being coupled to the sense terminal;
a demodulator including a signal input and a clock input;
a phase-locked loop;
wherein,the output of the drive amplifier is coupled to an input of the phase-locked loop;
the output of the phase-locked loop is coupled to the clock input;
an output of the sense amplifier is coupled to the signal input;
the MEMS gyroscope is operable to produce a signal at a drive frequency;
the demodulator is operable to demodulate a signal from the MEMS gyroscope;
the phase-locked loop is operable to suppress a phase error determined using both rising and falling edges of the phase-locked loop input.
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Abstract
A system and method in accordance with the present invention provides a gyroscope incorporating an improved PLL technique. The improved PLL auto-corrects its own reference low-frequency noise, thereby eliminating this source of noise, improving the noise performance of the gyroscope and allowing a compact implementation. The net result is a gyroscope with improved bias stability that can meet noise requirements with a smaller footprint.
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Citations
13 Claims
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1. A gyroscope system comprising:
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a MEMS gyroscope including a drive-sense terminal and a sense terminal; a drive amplifier being coupled to the drive-sense terminal; a sense amplifier being coupled to the sense terminal; a demodulator including a signal input and a clock input; a phase-locked loop; wherein, the output of the drive amplifier is coupled to an input of the phase-locked loop; the output of the phase-locked loop is coupled to the clock input; an output of the sense amplifier is coupled to the signal input; the MEMS gyroscope is operable to produce a signal at a drive frequency; the demodulator is operable to demodulate a signal from the MEMS gyroscope; the phase-locked loop is operable to suppress a phase error determined using both rising and falling edges of the phase-locked loop input. - View Dependent Claims (2, 3)
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4. A gyroscope system comprising:
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a MEMS gyroscope including a drive-sense terminal and a sense terminal; a drive amplifier being coupled to the drive-sense terminal; a sense amplifier being coupled to the sense terminal; a demodulator including a signal input and a clock input; a phase- and duty-cycle locked loop (PDCLL); wherein, the output of the drive amplifier is coupled to an input of the phase- and duty-cycle locked loop; the output of the phase- and duty-cycle locked loop is coupled to the clock input; an output of the sense amplifier is coupled to the signal input; the MEMS gyroscope is operable to produce a signal at a drive frequency; the demodulator is operable to demodulate a signal from the MEMS gyroscope; the phase- and duty-cycle locked loop is operable to suppress a phase error and to suppress a duty-cycle error determined using both rising and falling edges of the phase- and duty-cycle locked loop input. - View Dependent Claims (5, 6, 7)
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8. A phase- and duty-cycle locked loop (PDCLL) comprising:
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a phase locked loop (PLL) comprising a reference clock and a divider clock, a duty-cycle correction loop, and a phase-frequency and duty-cycle detector (PFDCD), wherein, the PFDCD is operable to measure a phase error and a duty-cycle error between the reference clock and divider clock using both rising and falling edges of both clocks, the PLL is operable to substantially eliminate the phase error, the duty-cycle correction loop is operable to substantially eliminate the duty-cycle error. - View Dependent Claims (9, 10)
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11. A method for simultaneous phase and duty-cycle correction, comprising the steps of:
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receiving a reference clock comprising first rising and falling edges; receiving a divider clock comprising second rising and falling edges; measuring a first timing error between first and second rising edges; measuring a second timing error between first and second falling edges; computing a phase error comprising the sum of the first and second timing errors; computing a duty-cycle error comprising the difference of the first and second timing errors; adjusting a clock frequency responsive to the phase error such that the phase error is minimized; and adjusting a clock duty-cycle responsive to the duty-cycle error such that the duty-cycle error is minimized.
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12. A method for gyroscope rate signal demodulation, comprising the steps of:
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receiving a drive-sense signal from a MEMS gyroscope; receiving a sense signal from a MEMS gyroscope; generating a reference clock comprising first rising and falling edges from the drive-sense signal; generating an output clock with a frequency proportional to the drive-sense signal frequency; generating a divider clock comprising second rising and falling edges from the output clock; measuring a first timing error between first and second rising edges; measuring a second timing error between first and second falling edges; computing a phase error comprising the sum of the first and second timing errors; computing a duty-cycle error comprising the difference of the first and second timing errors; adjusting a clock frequency responsive to the phase error such that the phase error is minimized; adjusting a clock duty-cycle responsive to the duty-cycle error such that the duty-cycle error is minimized; demodulating the sense signal using a clock signal derived from the output clock. - View Dependent Claims (13)
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Specification