MICROSYSTEM DEVICE AND METHODS FOR FABRICATING THE SAME

• US 20130105921A1
• Filed: 10/31/2012
• Published: 05/02/2013
• Est. Priority Date: 10/31/2011
• Status: Active Grant

• Current Assignee: Board of Regents of the University of Michigan (University of Michigan)
• Original Assignee: Board of Regents of the University of Michigan (University of Michigan)
• Inventors: Najafi, Khalil, Gregory, Jeffrey, Cao, Zongliang, Peterson, Rebecca L., He, Guohong, Cho, Jae Yoong, Yuan, Yi
• Granted Patent: US 9,778,039 B2
• Time in Patent Office: Days
• US Class Current: 257/415
• CPC Class Codes: G01C 19/5712 the devices involving a micromechanical structure
• CPC Class Codes: G01C 19/574 the devices having two sensing masses in anti-phase motion
• CPC Class Codes: G01C 19/5769 Manufacturing; Mounting; Housings
• CPC Class Codes: G01P 15/0802 Details
• CPC Class Codes: G01P 15/097 by vibratory elements
• CPC Class Codes: G01P 15/125 by capacitive pick-up

Abstract

A microsystem includes a base layer formed from an electrical insulating material. The base layer has an inner surface defining a cavity and an external surface opposed to the inner surface, and in direct communication with an environment. A cap layer and a microelectromechanical (MEMS) device layer are formed from electrical insulating material or an other electrical insulating material. The cap has an inner surface defining a cavity, and an external surface opposed to the inner surface, and in direct communication with the environment. A MEMS device on/in the MEMS device layer is disposed between the base and the cap. Respective adjacent portions of the base, the cap and the device substrate are bonded to define an enclosed space. The enclosed space at least partially includes the base cavity or the cap cavity. At least a portion of a MEMS device on the device layer is in the enclosed space.

Claims

1. A microsystem, comprising:

a package base layer formed from a first substrate of an electrical insulating material, the package base layer having;

a base inner surface defining a base cavity; and

a base external surface opposed to the base inner surface, and in direct communication with an environment;

a cap layer formed from a second substrate of the electrical insulating material or of an other electrical insulating material, the cap layer having;

a cap inner surface defining a cap cavity; and

a cap external surface opposed to the cap inner surface, and in direct communication with the environment; and

a microelectromechanical (MEMS) device layer having a device layer substrate disposed between the package base layer and the cap layer, wherein respective adjacent portions of the package base layer, the cap layer and the device layer substrate are bonded to define an enclosed space between the package base layer and the cap layer, the enclosed space at least partially including the base cavity or the cap cavity;

wherein at least an operative portion of a MEMS device on or in the MEMS device layer is disposed in the enclosed space;

and wherein the MEMS device layer is formed from a substrate of the electrical insulating material or of an other electrical insulating material.

2. The microsystem as defined in claim 1 wherein the electrical insulating material and the other electrical insulating material are each independently chosen from fused silica, fused quartz, glass, ceramic, zero expansion glass-ceramic, ultra low expansion (ULE®

) glass, Zerodur®

, Pyrex®

, Borofloat®

, Clearceram®

, mica, alumina, sapphire, and quartz.

3. The microsystem as defined in claim 2, further comprising:

an additional MEMS device layer disposed between the package base layer and the cap layer, wherein the additional MEMS device layer is formed from silicon, silicon-on-insulator, silicon dioxide, germanium, silicon carbide, silicon carbon, graphite, graphene, gallium arsenide, gallium nitride, gallium phosphide, indium phosphide, zinc oxide, zinc sulfide, zinc selenide, lead zirconium titinate, cadmium selenide, cadmium telluride, cadmium mercury telluride, lithium niobate, semiconductors, piezoelectrics, magnetics, ferroelectrics, graphite, lithium tantalite, yttrium aluminum garnet (YAG), magnesium oxide, magnesium fluoride, lithium fluoride, barium fluoride, barium titanate, strontium titanate, metals, fused silica, fused quartz, glass, ceramic, zero expansion glass-ceramic, ultra low expansion (ULE®

) glass, Zerodur®

, Pyrex®

, Borofloat®

, Clearceram®

, mica, alumina, sapphire, and quartz or combinations thereof.

4. The microsystem as defined in claim 1 wherein at least a portion of the MEMS device layer is unsupported by the MEMS device layer substrate.

5. The microsystem as defined in claim 1 wherein the MEMS device layer includes two MEMS device layers, each being formed from different substrate materials.

6. The microsystem as defined in claim 1, further comprising:

a feedthrough via formed in the respective adjacent stacked portions of the package base layer, the MEMS device layer;

or the cap layer; and

an electrical conductor disposed in the feedthrough via to allow electrical communication through the electrical insulating material or the other electrical insulating material with the MEMS device in the enclosed space.

7. The microsystem as defined in claim 1, further comprising an operative material deposited on at least a portion of the MEMS device layer, the base inner surface, the cap inner surface, or combinations thereof to serve a gettering function or to operatively perform as a portion of the microsystem.

8. The microsystem as defined in claim 1 wherein the MEMS device is chosen from sensors, actuators, mechanical isolators, thermal isolators, shock absorbers, and combinations thereof.

9. The microsystem as defined in claim 1 wherein the package base layer or the cap layer further includes at least one device chosen from sensors, actuators, mechanical isolators, thermal isolators, shock absorbers, and combinations thereof.

10. The microsystem as defined in claim 1 wherein the MEMS device layer includes two MEMS device layers, and wherein at least an operative portion of one of the two MEMS device layers is mechanically connected to at least an other operative portion of an other of the two MEMS device layers.

11. The microsystem as defined in claim 1 wherein at least an operative portion of the MEMS device layer is mechanically connected to at least an other operative portion of the package base layer or the cap layer.

12. The microsystem as defined in claim 1 wherein the MEMS device layer includes two MEMS device layers, and wherein at least an operative portion of one of the two MEMS device layers is mechanically isolated from at least an other operative portion of an other of the two MEMS device layers.

13. The microsystem as defined in claim 1 wherein an active device, capacitive element, or inductive element is attached to or integrated with the package base layer, the cap layer, or the MEMS device layer.

14. The microsystem as defined in claim 13 wherein the active device is flip chip bonded to the package base layer, the cap layer, or the MEMS device layer.

15. The microsystem as defined in claim 13 wherein the active device communicates optically through the package base layer, the cap layer, a partition layer or the MEMS device layer.

16. The microsystem as defined in claim 1 wherein at least a portion of the MEMS device is formed in the device layer substrate of the MEMS layer by micromachining.

17. The microsystem as defined in claim 1, further comprising:

a partition layer formed from a third substrate of the electrical insulating material, the partition layer having a first surface defining a first cavity and a second surface opposite the first surface defining a second cavity wherein the partition layer divides the enclosed space into at least two hydraulically separated enclosed spaces.

18. The microsystem as defined in claim 1 wherein the MEMS device communicates optically through the package base layer, the cap layer, a partition layer or the MEMS device layer.

19. The microsystem as defined in claim 1 wherein the package base layer, the cap layer, a partition layer and the MEMS device layer are electrically isolated from each other.

23. The microsystem as defined in claim 2 wherein the MEMS device layer includes:

a thermal-and-vibration-isolating platform;

a clock resonator disposed on the thermal-and-vibration-isolating platform;

a gyroscope disposed on an other thermal-and-vibration-isolating platform; and

an accelerometer disposed on the thermal-and-vibration-isolating platform.

24. The microsystem as defined in claim 23 wherein the gyroscope is a ring gyroscope or tuning fork gyroscope.

25. The microsystem as defined in claim 23 wherein the accelerometer is a double-ended tuning fork (DETF) resonant accelerometer a clamp-clamp beam resonant accelerometer, a vertically-hinged resonant accelerometer, or an electrostatic non-resonant accelerometer.

26. The microsystem as defined in claim 23 wherein the top cap layer and a bottom cap layer each include sensors, actuators, mechanical isolators, thermal isolators, shock absorbers, conductive layers, getters, transparent areas for optical access, or radiation shields.

27. The microsystem as defined in claim 3 wherein the additional MEMS device layer includes:

a thermal-and-vibration-isolating platform;

a clock resonator disposed on the thermal-and-vibration-isolating platform;

a gyroscope disposed on an other thermal-and-vibration-isolating platform; and

an accelerometer disposed on the thermal-and-vibration-isolating platform.

28. The microsystem as defined in claim 27 wherein the gyroscope is a ring gyroscope or a tuning fork gyroscope.

29. The microsystem as defined in claim 27 wherein the accelerometer is a double-ended tuning fork (DETF) resonant accelerometer, a clamp-clamp beam resonant accelerometer, a vertically-hinged resonant accelerometer, or an electrostatic non-resonant accelerometer.

30. The microsystem as defined in claim 27 wherein the top cap layer and a bottom cap layer each include a sensor, an actuator, a mechanical isolator, a thermal isolator, a shock absorber, a conductive layer, a getter, a transparent areas for optical access, or a radiation shield disposed thereon.

20. A method for fabricating a microsystem, comprising:

establishing a first fused silica substrate wherein the first fused silica substrate is about 200 micrometers thick;

patterning a thin metal to dispose a first electrode and conductor on the fused silica substrate;

patterning a thick metal to dispose a first bonding layer on the thin metal;

establishing a second fused silica substrate wherein the second fused silica substrate is about 500 micrometers thick;

attaching the first fused silica substrate to the second fused silica substrate wherein the first bonding layer and a mounting layer are between the first fused silica substrate and the second fused silica substrate;

grinding the first fused silica substrate to about 50 micrometers thick;

applying deep reactive-ion etching (DRIE) to pattern the first fused silica substrate and form an undercut in the mounting layer;

patterning sputtered metal to dispose a second electrode and conductor on the first fused silica substrate;

patterning a second thick metal on the second electrode and conductor to dispose a second thermal compression bonding layer;

releasing the first fused silica substrate or a portion thereof from the mounting layer;

cleaning the released first fused silica substrate or the portion thereof; and

annealing the released first fused silica substrate or the portion thereof.

21. The method as defined in claim 20, further comprising:

dicing a MEMS device on the second fused silica substrate to separate the MEMS device.

22. The method as defined in claim 20, further comprising:

establishing a base package layer;

stacking the MEMS device layer on the base package layer;

stacking a top cap layer on the MEMs device layer; and

applying pressure or heat to create a metal bond between the base package layer, the MEMS device layer; and

the top cap layer.