ASYMMETRICAL MULTILAYER SUBSTRATE, RF MODULE, AND METHOD FOR MANUFACTURING ASYMMETRICAL MULTILAYER SUBSTRATE
First Claim
1. An asymmetrical multilayer substrate comprising:
- a core layer in which a through-hole for passing through and connecting upper and lower portions thereof is formed;
a first pattern layer formed on one of upper and lower portions of the core layer, and including a first signal line pattern connected with the through-hole;
a second pattern layer formed on the other of the upper and lower portions of the core layer, and including a second metal plate providing a capacitance between itself and a pattern of an adjacent outer pattern layer and a second routing line pattern connected with the through-hole;
a first insulating layer formed on the second pattern layer so as to have a thinner thickness than a thickness of the core layer, and including a first via connected with the second routing line pattern; and
a third pattern layer formed on the first insulating layer, and including a third signal line pattern connected with the first via,wherein an impedance transformation circuit including an impedance load on a transmission line and a parasitic capacitance load on the transmission line is formed for impedance matching in signal transmission between the signal line patterns formed in the upper and lower side directions of the core layer, and the impedance load includes impedances of the through-hole, the second routing line pattern, and the first via which are forming the transmission line, and the parasitic capacitance load includes the capacitance provided by the second metal plate.
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Accused Products
Abstract
Disclosed herein are an asymmetrical multilayer substrate, an RF module, and a method for manufacturing the asymmetrical multilayer substrate. The asymmetrical multilayer substrate includes a core layer, a first pattern layer formed on one side of the core layer and including a first signal line pattern, a second pattern layer formed on the other side and including a second metal plate and a second routing line pattern, a first insulating layer thinner than the core layer formed on the second pattern layer and including a first via, and a third pattern layer formed on the first insulating layer and including a third signal line pattern, wherein an impedance transformation circuit including an impedance load and a parasitic capacitance load on the transmission line is formed for impedance matching in signal transmission between the signal line patterns formed in the upper and lower side directions of the core layer.
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Citations
20 Claims
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1. An asymmetrical multilayer substrate comprising:
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a core layer in which a through-hole for passing through and connecting upper and lower portions thereof is formed; a first pattern layer formed on one of upper and lower portions of the core layer, and including a first signal line pattern connected with the through-hole; a second pattern layer formed on the other of the upper and lower portions of the core layer, and including a second metal plate providing a capacitance between itself and a pattern of an adjacent outer pattern layer and a second routing line pattern connected with the through-hole; a first insulating layer formed on the second pattern layer so as to have a thinner thickness than a thickness of the core layer, and including a first via connected with the second routing line pattern; and a third pattern layer formed on the first insulating layer, and including a third signal line pattern connected with the first via, wherein an impedance transformation circuit including an impedance load on a transmission line and a parasitic capacitance load on the transmission line is formed for impedance matching in signal transmission between the signal line patterns formed in the upper and lower side directions of the core layer, and the impedance load includes impedances of the through-hole, the second routing line pattern, and the first via which are forming the transmission line, and the parasitic capacitance load includes the capacitance provided by the second metal plate. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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12. An RF module which uses an asymmetrical multilayer substrate in which an RF signal transmission line is formed, the asymmetrical multilayer substrate including:
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a core layer in which a through-hole for passing through and connecting upper and lower portions thereof is formed; a first pattern layer formed on one of upper and lower portions of the core layer, and including a first signal line pattern connected with the through-hole; a second pattern layer formed on the other of the upper and lower portions of the core layer, and including a second metal plate providing a capacitance between itself and a pattern of an adjacent outer pattern layer and a second routing line pattern connected with the through-hole; a first insulating layer formed on the second pattern layer so as to have a thinner thickness than a thickness of the core layer and including a first via connected with the second routing line pattern; and a third pattern layer formed on the first insulating layer and including a third signal line pattern connected with the first via, wherein an impedance transformation circuit including an impedance load on a transmission line and a parasitic capacitance load on the transmission line is formed for impedance matching in signal transmission between the signal line patterns formed in the upper and lower side directions of the core layer, and the impedance load includes impedances of the through-hole, the second routing line pattern, and the first via which are forming the transmission line, and the parasitic capacitance load includes the capacitance provided by the second metal plate. - View Dependent Claims (13)
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14. A method for manufacturing an asymmetrical multilayer substrate, the method comprising:
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preparing a core layer in which a through-hole for passing through and connecting upper and lower portions thereof is formed; forming, on one of upper and lower portions of the core layer, a first pattern layer including a first signal line pattern connected with the through-hole; forming, on the other of the upper and lower portions of the core layer, a second pattern layer including a second metal plate providing a capacitance between itself and a pattern of an adjacent outer pattern layer and a second routing line pattern connected with the through-hole; forming, on the second pattern layer, a first insulating layer having a thinner thickness than a thickness of the core layer; and forming a first via passing through the first insulating layer to be connected with the second routing pattern, and forming a third pattern layer, on the first insulating layer, a third pattern layer including a third signal line pattern connected with the first via, wherein an impedance transformation circuit including an impedance load on a transmission line and a parasitic capacitance load on the transmission line is formed for impedance matching in signal transmission between the signal line patterns formed in the upper and lower side directions of the core layer, and the impedance load includes impedances of the through-hole, the second routing line pattern, and the first via which are forming the transmission line, and the parasitic capacitance load includes the capacitance provided by the second metal plate. - View Dependent Claims (15, 16, 17, 18, 19, 20)
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Specification