CLOCK AND DATA RECOVERY FOR NFC TRANSCEIVERS
First Claim
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1. A transceiver comprising a phase-locked loop configured to recover a clock from a received input signal in a first mode and enable for oversampling of an output signal in a second, different mode.
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Abstract
Exemplary embodiments are directed to data and clock recovery in NFC transceivers. A transceiver may include a phase-locked loop configured to recover a clock from a received input signal in a first mode and enable for oversampling of an output signal in a second, different mode.
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Citations
25 Claims
- 1. A transceiver comprising a phase-locked loop configured to recover a clock from a received input signal in a first mode and enable for oversampling of an output signal in a second, different mode.
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8. A phase-locked loop, comprising:
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a frequency-phase detector; and an amplitude-shift keying detection circuit coupled to the frequency-phase detector and configured to detect an amplitude-shift keying mode. - View Dependent Claims (9, 10, 11, 12, 13)
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14. A method, comprising:
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recovering a clock from a received input signal with a phase-locked loop in a first near-field communication (NFC) mode; and oversampling of an output signal with the phase-locked loop in a second, different NFC mode. - View Dependent Claims (15, 16, 17, 18)
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19. A method, comprising:
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receiving an input signal at a phase-frequency detector in a tag mode; and detecting an amplitude-shift keying mode while receiving the input signal in the tag mode. - View Dependent Claims (20, 21, 22, 23)
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24. A device, comprising:
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means for recovering a clock from a received input signal with a phase-locked loop in a first NFC mode; and means for oversampling of an output signal with the phase-locked loop in a second, different NFC mode.
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25. A device, comprising:
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means for receiving an input signal at a phase-frequency detector in a tag mode; and means for detecting an amplitude-shift keying mode while receiving the input signal in the tag mode.
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Specification